/** \file hdr_sc.h
 * \brief Header with definition of bits in System Control registers
 * \author Freddie Chopin, http://www.freddiechopin.info/
 * \date 2012-04-06
 */

/******************************************************************************
* chip: LPC175x / LPC176x
* compiler: arm-none-eabi-gcc (GNU Tools for ARM Embedded Processors) 4.6.2
* 	20110921 (release) [ARM/embedded-4_6-branch revision 182083]
******************************************************************************/

#ifndef HDR_SC_H_
#define HDR_SC_H_

#include "hdr_bitband.h"

/*
+=============================================================================+
| global definitions
+=============================================================================+
*/

/*
+-----------------------------------------------------------------------------+
| FLASHCFG - Flash Accelerator Configuration register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_FLASHCFG_FLASHTIM_bit			12
#define LPC_SC_FLASHCFG_FLASHTIM_0_bit			12
#define LPC_SC_FLASHCFG_FLASHTIM_1_bit			13
#define LPC_SC_FLASHCFG_FLASHTIM_2_bit			14
#define LPC_SC_FLASHCFG_FLASHTIM_3_bit			15

#define LPC_SC_FLASHCFG_FLASHTIM_0				(1 << LPC_SC_FLASHCFG_FLASHTIM_0_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_1				(1 << LPC_SC_FLASHCFG_FLASHTIM_1_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_2				(1 << LPC_SC_FLASHCFG_FLASHTIM_2_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_3				(1 << LPC_SC_FLASHCFG_FLASHTIM_3_bit)

#define LPC_SC_FLASHCFG_RESERVED_value			0x3A

#define LPC_SC_FLASHCFG_FLASHTIM_1CLK_value		0
#define LPC_SC_FLASHCFG_FLASHTIM_2CLK_value		1
#define LPC_SC_FLASHCFG_FLASHTIM_3CLK_value		2
#define LPC_SC_FLASHCFG_FLASHTIM_4CLK_value		3
#define LPC_SC_FLASHCFG_FLASHTIM_5CLK_value		4
#define LPC_SC_FLASHCFG_FLASHTIM_6CLK_value		5
#define LPC_SC_FLASHCFG_FLASHTIM_mask			15

#define LPC_SC_FLASHCFG_FLASHTIM_1CLK			(LPC_SC_FLASHCFG_FLASHTIM_1CLK_value << LPC_SC_FLASHCFG_FLASHTIM_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_2CLK			(LPC_SC_FLASHCFG_FLASHTIM_2CLK_value << LPC_SC_FLASHCFG_FLASHTIM_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_3CLK			(LPC_SC_FLASHCFG_FLASHTIM_3CLK_value << LPC_SC_FLASHCFG_FLASHTIM_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_4CLK			(LPC_SC_FLASHCFG_FLASHTIM_4CLK_value << LPC_SC_FLASHCFG_FLASHTIM_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_5CLK			(LPC_SC_FLASHCFG_FLASHTIM_5CLK_value << LPC_SC_FLASHCFG_FLASHTIM_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_6CLK			(LPC_SC_FLASHCFG_FLASHTIM_6CLK_value << LPC_SC_FLASHCFG_FLASHTIM_bit)

#define LPC_SC_FLASHCFG_FLASHTIM_0_bb			bitband_t BITBAND(&LPC_SC->FLASHCFG, LPC_SC_FLASHCFG_FLASHTIM_0_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_1_bb			bitband_t BITBAND(&LPC_SC->FLASHCFG, LPC_SC_FLASHCFG_FLASHTIM_1_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_2_bb			bitband_t BITBAND(&LPC_SC->FLASHCFG, LPC_SC_FLASHCFG_FLASHTIM_2_bit)
#define LPC_SC_FLASHCFG_FLASHTIM_3_bb			bitband_t BITBAND(&LPC_SC->FLASHCFG, LPC_SC_FLASHCFG_FLASHTIM_3_bit)

/*
+-----------------------------------------------------------------------------+
| PLL0CON - PLL Control register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL0CON_PLLE0_bit				0
#define LPC_SC_PLL0CON_PLLC0_bit				1

#define LPC_SC_PLL0CON_PLLE0					(1 << LPC_SC_PLL0CON_PLLE0_bit)
#define LPC_SC_PLL0CON_PLLC0					(1 << LPC_SC_PLL0CON_PLLC0_bit)

#define LPC_SC_PLL0CON_PLLE0_bb					bitband_t BITBAND(&LPC_SC->PLL0CON, LPC_SC_PLL0CON_PLLE0_bit)
#define LPC_SC_PLL0CON_PLLC0_bb					bitband_t BITBAND(&LPC_SC->PLL0CON, LPC_SC_PLL0CON_PLLC0_bit)

/*
+-----------------------------------------------------------------------------+
| PLL0CFG - PLL0 Configuration register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL0CFG_MSEL0_bit				0
#define LPC_SC_PLL0CFG_MSEL0_0_bit				0
#define LPC_SC_PLL0CFG_MSEL0_1_bit				1
#define LPC_SC_PLL0CFG_MSEL0_2_bit				2
#define LPC_SC_PLL0CFG_MSEL0_3_bit				3
#define LPC_SC_PLL0CFG_MSEL0_4_bit				4
#define LPC_SC_PLL0CFG_MSEL0_5_bit				5
#define LPC_SC_PLL0CFG_MSEL0_6_bit				6
#define LPC_SC_PLL0CFG_MSEL0_7_bit				7
#define LPC_SC_PLL0CFG_MSEL0_8_bit				8
#define LPC_SC_PLL0CFG_MSEL0_9_bit				9
#define LPC_SC_PLL0CFG_MSEL0_10_bit				10
#define LPC_SC_PLL0CFG_MSEL0_11_bit				11
#define LPC_SC_PLL0CFG_MSEL0_12_bit				12
#define LPC_SC_PLL0CFG_MSEL0_13_bit				13
#define LPC_SC_PLL0CFG_MSEL0_14_bit				14

#define LPC_SC_PLL0CFG_NSEL0_bit				16
#define LPC_SC_PLL0CFG_NSEL0_0_bit				16
#define LPC_SC_PLL0CFG_NSEL0_1_bit				17
#define LPC_SC_PLL0CFG_NSEL0_2_bit				18
#define LPC_SC_PLL0CFG_NSEL0_3_bit				19
#define LPC_SC_PLL0CFG_NSEL0_4_bit				20
#define LPC_SC_PLL0CFG_NSEL0_5_bit				21
#define LPC_SC_PLL0CFG_NSEL0_6_bit				22
#define LPC_SC_PLL0CFG_NSEL0_7_bit				23

#define LPC_SC_PLL0CFG_MSEL0_0					(1 << LPC_SC_PLL0CFG_MSEL0_0_bit)
#define LPC_SC_PLL0CFG_MSEL0_1					(1 << LPC_SC_PLL0CFG_MSEL0_1_bit)
#define LPC_SC_PLL0CFG_MSEL0_2					(1 << LPC_SC_PLL0CFG_MSEL0_2_bit)
#define LPC_SC_PLL0CFG_MSEL0_3					(1 << LPC_SC_PLL0CFG_MSEL0_3_bit)
#define LPC_SC_PLL0CFG_MSEL0_4					(1 << LPC_SC_PLL0CFG_MSEL0_4_bit)
#define LPC_SC_PLL0CFG_MSEL0_5					(1 << LPC_SC_PLL0CFG_MSEL0_5_bit)
#define LPC_SC_PLL0CFG_MSEL0_6					(1 << LPC_SC_PLL0CFG_MSEL0_6_bit)
#define LPC_SC_PLL0CFG_MSEL0_7					(1 << LPC_SC_PLL0CFG_MSEL0_7_bit)
#define LPC_SC_PLL0CFG_MSEL0_8					(1 << LPC_SC_PLL0CFG_MSEL0_8_bit)
#define LPC_SC_PLL0CFG_MSEL0_9					(1 << LPC_SC_PLL0CFG_MSEL0_9_bit)
#define LPC_SC_PLL0CFG_MSEL0_10					(1 << LPC_SC_PLL0CFG_MSEL0_10_bit)
#define LPC_SC_PLL0CFG_MSEL0_11					(1 << LPC_SC_PLL0CFG_MSEL0_11_bit)
#define LPC_SC_PLL0CFG_MSEL0_12					(1 << LPC_SC_PLL0CFG_MSEL0_12_bit)
#define LPC_SC_PLL0CFG_MSEL0_13					(1 << LPC_SC_PLL0CFG_MSEL0_13_bit)
#define LPC_SC_PLL0CFG_MSEL0_14					(1 << LPC_SC_PLL0CFG_MSEL0_14_bit)

#define LPC_SC_PLL0CFG_NSEL0_0					(1 << LPC_SC_PLL0CFG_NSEL0_0_bit)
#define LPC_SC_PLL0CFG_NSEL0_1					(1 << LPC_SC_PLL0CFG_NSEL0_1_bit)
#define LPC_SC_PLL0CFG_NSEL0_2					(1 << LPC_SC_PLL0CFG_NSEL0_2_bit)
#define LPC_SC_PLL0CFG_NSEL0_3					(1 << LPC_SC_PLL0CFG_NSEL0_3_bit)
#define LPC_SC_PLL0CFG_NSEL0_4					(1 << LPC_SC_PLL0CFG_NSEL0_4_bit)
#define LPC_SC_PLL0CFG_NSEL0_5					(1 << LPC_SC_PLL0CFG_NSEL0_5_bit)
#define LPC_SC_PLL0CFG_NSEL0_6					(1 << LPC_SC_PLL0CFG_NSEL0_6_bit)
#define LPC_SC_PLL0CFG_NSEL0_7					(1 << LPC_SC_PLL0CFG_NSEL0_7_bit)

#define LPC_SC_PLL0CFG_MSEL0_MUL6_value			5
#define LPC_SC_PLL0CFG_MSEL0_MUL7_value			6
#define LPC_SC_PLL0CFG_MSEL0_MUL8_value			7
#define LPC_SC_PLL0CFG_MSEL0_MUL9_value			8
#define LPC_SC_PLL0CFG_MSEL0_MUL10_value		9
#define LPC_SC_PLL0CFG_MSEL0_MUL11_value		10
#define LPC_SC_PLL0CFG_MSEL0_MUL12_value		11
#define LPC_SC_PLL0CFG_MSEL0_MUL13_value		12
#define LPC_SC_PLL0CFG_MSEL0_MUL14_value		13
#define LPC_SC_PLL0CFG_MSEL0_MUL15_value		14
#define LPC_SC_PLL0CFG_MSEL0_MUL16_value		15
#define LPC_SC_PLL0CFG_MSEL0_MUL17_value		16
#define LPC_SC_PLL0CFG_MSEL0_MUL18_value		17
#define LPC_SC_PLL0CFG_MSEL0_MUL19_value		18
#define LPC_SC_PLL0CFG_MSEL0_MUL20_value		19
#define LPC_SC_PLL0CFG_MSEL0_MUL21_value		20
#define LPC_SC_PLL0CFG_MSEL0_MUL22_value		21
#define LPC_SC_PLL0CFG_MSEL0_MUL23_value		22
#define LPC_SC_PLL0CFG_MSEL0_MUL24_value		23
#define LPC_SC_PLL0CFG_MSEL0_MUL25_value		24
#define LPC_SC_PLL0CFG_MSEL0_MUL26_value		25
#define LPC_SC_PLL0CFG_MSEL0_MUL27_value		26
#define LPC_SC_PLL0CFG_MSEL0_MUL28_value		27
#define LPC_SC_PLL0CFG_MSEL0_MUL29_value		28
#define LPC_SC_PLL0CFG_MSEL0_MUL30_value		29
#define LPC_SC_PLL0CFG_MSEL0_MUL31_value		30
#define LPC_SC_PLL0CFG_MSEL0_MUL32_value		31
#define LPC_SC_PLL0CFG_MSEL0_MUL33_value		32
#define LPC_SC_PLL0CFG_MSEL0_MUL34_value		33
#define LPC_SC_PLL0CFG_MSEL0_MUL35_value		34
#define LPC_SC_PLL0CFG_MSEL0_MUL36_value		35
#define LPC_SC_PLL0CFG_MSEL0_MUL37_value		36
#define LPC_SC_PLL0CFG_MSEL0_MUL38_value		37
#define LPC_SC_PLL0CFG_MSEL0_MUL39_value		38
#define LPC_SC_PLL0CFG_MSEL0_MUL40_value		39
#define LPC_SC_PLL0CFG_MSEL0_MUL41_value		40
#define LPC_SC_PLL0CFG_MSEL0_MUL42_value		41
#define LPC_SC_PLL0CFG_MSEL0_MUL43_value		42
#define LPC_SC_PLL0CFG_MSEL0_MUL44_value		43
#define LPC_SC_PLL0CFG_MSEL0_MUL45_value		44
#define LPC_SC_PLL0CFG_MSEL0_MUL46_value		45
#define LPC_SC_PLL0CFG_MSEL0_MUL47_value		46
#define LPC_SC_PLL0CFG_MSEL0_MUL48_value		47
#define LPC_SC_PLL0CFG_MSEL0_MUL49_value		48
#define LPC_SC_PLL0CFG_MSEL0_MUL50_value		49
#define LPC_SC_PLL0CFG_MSEL0_MUL51_value		50
#define LPC_SC_PLL0CFG_MSEL0_MUL52_value		51
#define LPC_SC_PLL0CFG_MSEL0_MUL53_value		52
#define LPC_SC_PLL0CFG_MSEL0_MUL54_value		53
#define LPC_SC_PLL0CFG_MSEL0_MUL55_value		54
#define LPC_SC_PLL0CFG_MSEL0_MUL56_value		55
#define LPC_SC_PLL0CFG_MSEL0_MUL57_value		56
#define LPC_SC_PLL0CFG_MSEL0_MUL58_value		57
#define LPC_SC_PLL0CFG_MSEL0_MUL59_value		58
#define LPC_SC_PLL0CFG_MSEL0_MUL60_value		59
#define LPC_SC_PLL0CFG_MSEL0_MUL61_value		60
#define LPC_SC_PLL0CFG_MSEL0_MUL62_value		61
#define LPC_SC_PLL0CFG_MSEL0_MUL63_value		62
#define LPC_SC_PLL0CFG_MSEL0_MUL64_value		63
#define LPC_SC_PLL0CFG_MSEL0_MUL65_value		64
#define LPC_SC_PLL0CFG_MSEL0_MUL66_value		65
#define LPC_SC_PLL0CFG_MSEL0_MUL67_value		66
#define LPC_SC_PLL0CFG_MSEL0_MUL68_value		67
#define LPC_SC_PLL0CFG_MSEL0_MUL69_value		68
#define LPC_SC_PLL0CFG_MSEL0_MUL70_value		69
#define LPC_SC_PLL0CFG_MSEL0_MUL71_value		70
#define LPC_SC_PLL0CFG_MSEL0_MUL72_value		71
#define LPC_SC_PLL0CFG_MSEL0_MUL73_value		72
#define LPC_SC_PLL0CFG_MSEL0_MUL74_value		73
#define LPC_SC_PLL0CFG_MSEL0_MUL75_value		74
#define LPC_SC_PLL0CFG_MSEL0_MUL76_value		75
#define LPC_SC_PLL0CFG_MSEL0_MUL77_value		76
#define LPC_SC_PLL0CFG_MSEL0_MUL78_value		77
#define LPC_SC_PLL0CFG_MSEL0_MUL79_value		78
#define LPC_SC_PLL0CFG_MSEL0_MUL80_value		79
#define LPC_SC_PLL0CFG_MSEL0_MUL81_value		80
#define LPC_SC_PLL0CFG_MSEL0_MUL82_value		81
#define LPC_SC_PLL0CFG_MSEL0_MUL83_value		82
#define LPC_SC_PLL0CFG_MSEL0_MUL84_value		83
#define LPC_SC_PLL0CFG_MSEL0_MUL85_value		84
#define LPC_SC_PLL0CFG_MSEL0_MUL86_value		85
#define LPC_SC_PLL0CFG_MSEL0_MUL87_value		86
#define LPC_SC_PLL0CFG_MSEL0_MUL88_value		87
#define LPC_SC_PLL0CFG_MSEL0_MUL89_value		88
#define LPC_SC_PLL0CFG_MSEL0_MUL90_value		89
#define LPC_SC_PLL0CFG_MSEL0_MUL91_value		90
#define LPC_SC_PLL0CFG_MSEL0_MUL92_value		91
#define LPC_SC_PLL0CFG_MSEL0_MUL93_value		92
#define LPC_SC_PLL0CFG_MSEL0_MUL94_value		93
#define LPC_SC_PLL0CFG_MSEL0_MUL95_value		94
#define LPC_SC_PLL0CFG_MSEL0_MUL96_value		95
#define LPC_SC_PLL0CFG_MSEL0_MUL97_value		96
#define LPC_SC_PLL0CFG_MSEL0_MUL98_value		97
#define LPC_SC_PLL0CFG_MSEL0_MUL99_value		98
#define LPC_SC_PLL0CFG_MSEL0_MUL100_value		99
#define LPC_SC_PLL0CFG_MSEL0_MUL101_value		100
#define LPC_SC_PLL0CFG_MSEL0_MUL102_value		101
#define LPC_SC_PLL0CFG_MSEL0_MUL103_value		102
#define LPC_SC_PLL0CFG_MSEL0_MUL104_value		103
#define LPC_SC_PLL0CFG_MSEL0_MUL105_value		104
#define LPC_SC_PLL0CFG_MSEL0_MUL106_value		105
#define LPC_SC_PLL0CFG_MSEL0_MUL107_value		106
#define LPC_SC_PLL0CFG_MSEL0_MUL108_value		107
#define LPC_SC_PLL0CFG_MSEL0_MUL109_value		108
#define LPC_SC_PLL0CFG_MSEL0_MUL110_value		109
#define LPC_SC_PLL0CFG_MSEL0_MUL111_value		110
#define LPC_SC_PLL0CFG_MSEL0_MUL112_value		111
#define LPC_SC_PLL0CFG_MSEL0_MUL113_value		112
#define LPC_SC_PLL0CFG_MSEL0_MUL114_value		113
#define LPC_SC_PLL0CFG_MSEL0_MUL115_value		114
#define LPC_SC_PLL0CFG_MSEL0_MUL116_value		115
#define LPC_SC_PLL0CFG_MSEL0_MUL117_value		116
#define LPC_SC_PLL0CFG_MSEL0_MUL118_value		117
#define LPC_SC_PLL0CFG_MSEL0_MUL119_value		118
#define LPC_SC_PLL0CFG_MSEL0_MUL120_value		119
#define LPC_SC_PLL0CFG_MSEL0_MUL121_value		120
#define LPC_SC_PLL0CFG_MSEL0_MUL122_value		121
#define LPC_SC_PLL0CFG_MSEL0_MUL123_value		122
#define LPC_SC_PLL0CFG_MSEL0_MUL124_value		123
#define LPC_SC_PLL0CFG_MSEL0_MUL125_value		124
#define LPC_SC_PLL0CFG_MSEL0_MUL126_value		125
#define LPC_SC_PLL0CFG_MSEL0_MUL127_value		126
#define LPC_SC_PLL0CFG_MSEL0_MUL128_value		127
#define LPC_SC_PLL0CFG_MSEL0_MUL129_value		128
#define LPC_SC_PLL0CFG_MSEL0_MUL130_value		129
#define LPC_SC_PLL0CFG_MSEL0_MUL131_value		130
#define LPC_SC_PLL0CFG_MSEL0_MUL132_value		131
#define LPC_SC_PLL0CFG_MSEL0_MUL133_value		132
#define LPC_SC_PLL0CFG_MSEL0_MUL134_value		133
#define LPC_SC_PLL0CFG_MSEL0_MUL135_value		134
#define LPC_SC_PLL0CFG_MSEL0_MUL136_value		135
#define LPC_SC_PLL0CFG_MSEL0_MUL137_value		136
#define LPC_SC_PLL0CFG_MSEL0_MUL138_value		137
#define LPC_SC_PLL0CFG_MSEL0_MUL139_value		138
#define LPC_SC_PLL0CFG_MSEL0_MUL140_value		139
#define LPC_SC_PLL0CFG_MSEL0_MUL141_value		140
#define LPC_SC_PLL0CFG_MSEL0_MUL142_value		141
#define LPC_SC_PLL0CFG_MSEL0_MUL143_value		142
#define LPC_SC_PLL0CFG_MSEL0_MUL144_value		143
#define LPC_SC_PLL0CFG_MSEL0_MUL145_value		144
#define LPC_SC_PLL0CFG_MSEL0_MUL146_value		145
#define LPC_SC_PLL0CFG_MSEL0_MUL147_value		146
#define LPC_SC_PLL0CFG_MSEL0_MUL148_value		147
#define LPC_SC_PLL0CFG_MSEL0_MUL149_value		148
#define LPC_SC_PLL0CFG_MSEL0_MUL150_value		149
#define LPC_SC_PLL0CFG_MSEL0_MUL151_value		150
#define LPC_SC_PLL0CFG_MSEL0_MUL152_value		151
#define LPC_SC_PLL0CFG_MSEL0_MUL153_value		152
#define LPC_SC_PLL0CFG_MSEL0_MUL154_value		153
#define LPC_SC_PLL0CFG_MSEL0_MUL155_value		154
#define LPC_SC_PLL0CFG_MSEL0_MUL156_value		155
#define LPC_SC_PLL0CFG_MSEL0_MUL157_value		156
#define LPC_SC_PLL0CFG_MSEL0_MUL158_value		157
#define LPC_SC_PLL0CFG_MSEL0_MUL159_value		158
#define LPC_SC_PLL0CFG_MSEL0_MUL160_value		159
#define LPC_SC_PLL0CFG_MSEL0_MUL161_value		160
#define LPC_SC_PLL0CFG_MSEL0_MUL162_value		161
#define LPC_SC_PLL0CFG_MSEL0_MUL163_value		162
#define LPC_SC_PLL0CFG_MSEL0_MUL164_value		163
#define LPC_SC_PLL0CFG_MSEL0_MUL165_value		164
#define LPC_SC_PLL0CFG_MSEL0_MUL166_value		165
#define LPC_SC_PLL0CFG_MSEL0_MUL167_value		166
#define LPC_SC_PLL0CFG_MSEL0_MUL168_value		167
#define LPC_SC_PLL0CFG_MSEL0_MUL169_value		168
#define LPC_SC_PLL0CFG_MSEL0_MUL170_value		169
#define LPC_SC_PLL0CFG_MSEL0_MUL171_value		170
#define LPC_SC_PLL0CFG_MSEL0_MUL172_value		171
#define LPC_SC_PLL0CFG_MSEL0_MUL173_value		172
#define LPC_SC_PLL0CFG_MSEL0_MUL174_value		173
#define LPC_SC_PLL0CFG_MSEL0_MUL175_value		174
#define LPC_SC_PLL0CFG_MSEL0_MUL176_value		175
#define LPC_SC_PLL0CFG_MSEL0_MUL177_value		176
#define LPC_SC_PLL0CFG_MSEL0_MUL178_value		177
#define LPC_SC_PLL0CFG_MSEL0_MUL179_value		178
#define LPC_SC_PLL0CFG_MSEL0_MUL180_value		179
#define LPC_SC_PLL0CFG_MSEL0_MUL181_value		180
#define LPC_SC_PLL0CFG_MSEL0_MUL182_value		181
#define LPC_SC_PLL0CFG_MSEL0_MUL183_value		182
#define LPC_SC_PLL0CFG_MSEL0_MUL184_value		183
#define LPC_SC_PLL0CFG_MSEL0_MUL185_value		184
#define LPC_SC_PLL0CFG_MSEL0_MUL186_value		185
#define LPC_SC_PLL0CFG_MSEL0_MUL187_value		186
#define LPC_SC_PLL0CFG_MSEL0_MUL188_value		187
#define LPC_SC_PLL0CFG_MSEL0_MUL189_value		188
#define LPC_SC_PLL0CFG_MSEL0_MUL190_value		189
#define LPC_SC_PLL0CFG_MSEL0_MUL191_value		190
#define LPC_SC_PLL0CFG_MSEL0_MUL192_value		191
#define LPC_SC_PLL0CFG_MSEL0_MUL193_value		192
#define LPC_SC_PLL0CFG_MSEL0_MUL194_value		193
#define LPC_SC_PLL0CFG_MSEL0_MUL195_value		194
#define LPC_SC_PLL0CFG_MSEL0_MUL196_value		195
#define LPC_SC_PLL0CFG_MSEL0_MUL197_value		196
#define LPC_SC_PLL0CFG_MSEL0_MUL198_value		197
#define LPC_SC_PLL0CFG_MSEL0_MUL199_value		198
#define LPC_SC_PLL0CFG_MSEL0_MUL200_value		199
#define LPC_SC_PLL0CFG_MSEL0_MUL201_value		200
#define LPC_SC_PLL0CFG_MSEL0_MUL202_value		201
#define LPC_SC_PLL0CFG_MSEL0_MUL203_value		202
#define LPC_SC_PLL0CFG_MSEL0_MUL204_value		203
#define LPC_SC_PLL0CFG_MSEL0_MUL205_value		204
#define LPC_SC_PLL0CFG_MSEL0_MUL206_value		205
#define LPC_SC_PLL0CFG_MSEL0_MUL207_value		206
#define LPC_SC_PLL0CFG_MSEL0_MUL208_value		207
#define LPC_SC_PLL0CFG_MSEL0_MUL209_value		208
#define LPC_SC_PLL0CFG_MSEL0_MUL210_value		209
#define LPC_SC_PLL0CFG_MSEL0_MUL211_value		210
#define LPC_SC_PLL0CFG_MSEL0_MUL212_value		211
#define LPC_SC_PLL0CFG_MSEL0_MUL213_value		212
#define LPC_SC_PLL0CFG_MSEL0_MUL214_value		213
#define LPC_SC_PLL0CFG_MSEL0_MUL215_value		214
#define LPC_SC_PLL0CFG_MSEL0_MUL216_value		215
#define LPC_SC_PLL0CFG_MSEL0_MUL217_value		216
#define LPC_SC_PLL0CFG_MSEL0_MUL218_value		217
#define LPC_SC_PLL0CFG_MSEL0_MUL219_value		218
#define LPC_SC_PLL0CFG_MSEL0_MUL220_value		219
#define LPC_SC_PLL0CFG_MSEL0_MUL221_value		220
#define LPC_SC_PLL0CFG_MSEL0_MUL222_value		221
#define LPC_SC_PLL0CFG_MSEL0_MUL223_value		222
#define LPC_SC_PLL0CFG_MSEL0_MUL224_value		223
#define LPC_SC_PLL0CFG_MSEL0_MUL225_value		224
#define LPC_SC_PLL0CFG_MSEL0_MUL226_value		225
#define LPC_SC_PLL0CFG_MSEL0_MUL227_value		226
#define LPC_SC_PLL0CFG_MSEL0_MUL228_value		227
#define LPC_SC_PLL0CFG_MSEL0_MUL229_value		228
#define LPC_SC_PLL0CFG_MSEL0_MUL230_value		229
#define LPC_SC_PLL0CFG_MSEL0_MUL231_value		230
#define LPC_SC_PLL0CFG_MSEL0_MUL232_value		231
#define LPC_SC_PLL0CFG_MSEL0_MUL233_value		232
#define LPC_SC_PLL0CFG_MSEL0_MUL234_value		233
#define LPC_SC_PLL0CFG_MSEL0_MUL235_value		234
#define LPC_SC_PLL0CFG_MSEL0_MUL236_value		235
#define LPC_SC_PLL0CFG_MSEL0_MUL237_value		236
#define LPC_SC_PLL0CFG_MSEL0_MUL238_value		237
#define LPC_SC_PLL0CFG_MSEL0_MUL239_value		238
#define LPC_SC_PLL0CFG_MSEL0_MUL240_value		239
#define LPC_SC_PLL0CFG_MSEL0_MUL241_value		240
#define LPC_SC_PLL0CFG_MSEL0_MUL242_value		241
#define LPC_SC_PLL0CFG_MSEL0_MUL243_value		242
#define LPC_SC_PLL0CFG_MSEL0_MUL244_value		243
#define LPC_SC_PLL0CFG_MSEL0_MUL245_value		244
#define LPC_SC_PLL0CFG_MSEL0_MUL246_value		245
#define LPC_SC_PLL0CFG_MSEL0_MUL247_value		246
#define LPC_SC_PLL0CFG_MSEL0_MUL248_value		247
#define LPC_SC_PLL0CFG_MSEL0_MUL249_value		248
#define LPC_SC_PLL0CFG_MSEL0_MUL250_value		249
#define LPC_SC_PLL0CFG_MSEL0_MUL251_value		250
#define LPC_SC_PLL0CFG_MSEL0_MUL252_value		251
#define LPC_SC_PLL0CFG_MSEL0_MUL253_value		252
#define LPC_SC_PLL0CFG_MSEL0_MUL254_value		253
#define LPC_SC_PLL0CFG_MSEL0_MUL255_value		254
#define LPC_SC_PLL0CFG_MSEL0_MUL256_value		255
#define LPC_SC_PLL0CFG_MSEL0_MUL257_value		256
#define LPC_SC_PLL0CFG_MSEL0_MUL258_value		257
#define LPC_SC_PLL0CFG_MSEL0_MUL259_value		258
#define LPC_SC_PLL0CFG_MSEL0_MUL260_value		259
#define LPC_SC_PLL0CFG_MSEL0_MUL261_value		260
#define LPC_SC_PLL0CFG_MSEL0_MUL262_value		261
#define LPC_SC_PLL0CFG_MSEL0_MUL263_value		262
#define LPC_SC_PLL0CFG_MSEL0_MUL264_value		263
#define LPC_SC_PLL0CFG_MSEL0_MUL265_value		264
#define LPC_SC_PLL0CFG_MSEL0_MUL266_value		265
#define LPC_SC_PLL0CFG_MSEL0_MUL267_value		266
#define LPC_SC_PLL0CFG_MSEL0_MUL268_value		267
#define LPC_SC_PLL0CFG_MSEL0_MUL269_value		268
#define LPC_SC_PLL0CFG_MSEL0_MUL270_value		269
#define LPC_SC_PLL0CFG_MSEL0_MUL271_value		270
#define LPC_SC_PLL0CFG_MSEL0_MUL272_value		271
#define LPC_SC_PLL0CFG_MSEL0_MUL273_value		272
#define LPC_SC_PLL0CFG_MSEL0_MUL274_value		273
#define LPC_SC_PLL0CFG_MSEL0_MUL275_value		274
#define LPC_SC_PLL0CFG_MSEL0_MUL276_value		275
#define LPC_SC_PLL0CFG_MSEL0_MUL277_value		276
#define LPC_SC_PLL0CFG_MSEL0_MUL278_value		277
#define LPC_SC_PLL0CFG_MSEL0_MUL279_value		278
#define LPC_SC_PLL0CFG_MSEL0_MUL280_value		279
#define LPC_SC_PLL0CFG_MSEL0_MUL281_value		280
#define LPC_SC_PLL0CFG_MSEL0_MUL282_value		281
#define LPC_SC_PLL0CFG_MSEL0_MUL283_value		282
#define LPC_SC_PLL0CFG_MSEL0_MUL284_value		283
#define LPC_SC_PLL0CFG_MSEL0_MUL285_value		284
#define LPC_SC_PLL0CFG_MSEL0_MUL286_value		285
#define LPC_SC_PLL0CFG_MSEL0_MUL287_value		286
#define LPC_SC_PLL0CFG_MSEL0_MUL288_value		287
#define LPC_SC_PLL0CFG_MSEL0_MUL289_value		288
#define LPC_SC_PLL0CFG_MSEL0_MUL290_value		289
#define LPC_SC_PLL0CFG_MSEL0_MUL291_value		290
#define LPC_SC_PLL0CFG_MSEL0_MUL292_value		291
#define LPC_SC_PLL0CFG_MSEL0_MUL293_value		292
#define LPC_SC_PLL0CFG_MSEL0_MUL294_value		293
#define LPC_SC_PLL0CFG_MSEL0_MUL295_value		294
#define LPC_SC_PLL0CFG_MSEL0_MUL296_value		295
#define LPC_SC_PLL0CFG_MSEL0_MUL297_value		296
#define LPC_SC_PLL0CFG_MSEL0_MUL298_value		297
#define LPC_SC_PLL0CFG_MSEL0_MUL299_value		298
#define LPC_SC_PLL0CFG_MSEL0_MUL300_value		299
#define LPC_SC_PLL0CFG_MSEL0_MUL301_value		300
#define LPC_SC_PLL0CFG_MSEL0_MUL302_value		301
#define LPC_SC_PLL0CFG_MSEL0_MUL303_value		302
#define LPC_SC_PLL0CFG_MSEL0_MUL304_value		303
#define LPC_SC_PLL0CFG_MSEL0_MUL305_value		304
#define LPC_SC_PLL0CFG_MSEL0_MUL306_value		305
#define LPC_SC_PLL0CFG_MSEL0_MUL307_value		306
#define LPC_SC_PLL0CFG_MSEL0_MUL308_value		307
#define LPC_SC_PLL0CFG_MSEL0_MUL309_value		308
#define LPC_SC_PLL0CFG_MSEL0_MUL310_value		309
#define LPC_SC_PLL0CFG_MSEL0_MUL311_value		310
#define LPC_SC_PLL0CFG_MSEL0_MUL312_value		311
#define LPC_SC_PLL0CFG_MSEL0_MUL313_value		312
#define LPC_SC_PLL0CFG_MSEL0_MUL314_value		313
#define LPC_SC_PLL0CFG_MSEL0_MUL315_value		314
#define LPC_SC_PLL0CFG_MSEL0_MUL316_value		315
#define LPC_SC_PLL0CFG_MSEL0_MUL317_value		316
#define LPC_SC_PLL0CFG_MSEL0_MUL318_value		317
#define LPC_SC_PLL0CFG_MSEL0_MUL319_value		318
#define LPC_SC_PLL0CFG_MSEL0_MUL320_value		319
#define LPC_SC_PLL0CFG_MSEL0_MUL321_value		320
#define LPC_SC_PLL0CFG_MSEL0_MUL322_value		321
#define LPC_SC_PLL0CFG_MSEL0_MUL323_value		322
#define LPC_SC_PLL0CFG_MSEL0_MUL324_value		323
#define LPC_SC_PLL0CFG_MSEL0_MUL325_value		324
#define LPC_SC_PLL0CFG_MSEL0_MUL326_value		325
#define LPC_SC_PLL0CFG_MSEL0_MUL327_value		326
#define LPC_SC_PLL0CFG_MSEL0_MUL328_value		327
#define LPC_SC_PLL0CFG_MSEL0_MUL329_value		328
#define LPC_SC_PLL0CFG_MSEL0_MUL330_value		329
#define LPC_SC_PLL0CFG_MSEL0_MUL331_value		330
#define LPC_SC_PLL0CFG_MSEL0_MUL332_value		331
#define LPC_SC_PLL0CFG_MSEL0_MUL333_value		332
#define LPC_SC_PLL0CFG_MSEL0_MUL334_value		333
#define LPC_SC_PLL0CFG_MSEL0_MUL335_value		334
#define LPC_SC_PLL0CFG_MSEL0_MUL336_value		335
#define LPC_SC_PLL0CFG_MSEL0_MUL337_value		336
#define LPC_SC_PLL0CFG_MSEL0_MUL338_value		337
#define LPC_SC_PLL0CFG_MSEL0_MUL339_value		338
#define LPC_SC_PLL0CFG_MSEL0_MUL340_value		339
#define LPC_SC_PLL0CFG_MSEL0_MUL341_value		340
#define LPC_SC_PLL0CFG_MSEL0_MUL342_value		341
#define LPC_SC_PLL0CFG_MSEL0_MUL343_value		342
#define LPC_SC_PLL0CFG_MSEL0_MUL344_value		343
#define LPC_SC_PLL0CFG_MSEL0_MUL345_value		344
#define LPC_SC_PLL0CFG_MSEL0_MUL346_value		345
#define LPC_SC_PLL0CFG_MSEL0_MUL347_value		346
#define LPC_SC_PLL0CFG_MSEL0_MUL348_value		347
#define LPC_SC_PLL0CFG_MSEL0_MUL349_value		348
#define LPC_SC_PLL0CFG_MSEL0_MUL350_value		349
#define LPC_SC_PLL0CFG_MSEL0_MUL351_value		350
#define LPC_SC_PLL0CFG_MSEL0_MUL352_value		351
#define LPC_SC_PLL0CFG_MSEL0_MUL353_value		352
#define LPC_SC_PLL0CFG_MSEL0_MUL354_value		353
#define LPC_SC_PLL0CFG_MSEL0_MUL355_value		354
#define LPC_SC_PLL0CFG_MSEL0_MUL356_value		355
#define LPC_SC_PLL0CFG_MSEL0_MUL357_value		356
#define LPC_SC_PLL0CFG_MSEL0_MUL358_value		357
#define LPC_SC_PLL0CFG_MSEL0_MUL359_value		358
#define LPC_SC_PLL0CFG_MSEL0_MUL360_value		359
#define LPC_SC_PLL0CFG_MSEL0_MUL361_value		360
#define LPC_SC_PLL0CFG_MSEL0_MUL362_value		361
#define LPC_SC_PLL0CFG_MSEL0_MUL363_value		362
#define LPC_SC_PLL0CFG_MSEL0_MUL364_value		363
#define LPC_SC_PLL0CFG_MSEL0_MUL365_value		364
#define LPC_SC_PLL0CFG_MSEL0_MUL366_value		365
#define LPC_SC_PLL0CFG_MSEL0_MUL367_value		366
#define LPC_SC_PLL0CFG_MSEL0_MUL368_value		367
#define LPC_SC_PLL0CFG_MSEL0_MUL369_value		368
#define LPC_SC_PLL0CFG_MSEL0_MUL370_value		369
#define LPC_SC_PLL0CFG_MSEL0_MUL371_value		370
#define LPC_SC_PLL0CFG_MSEL0_MUL372_value		371
#define LPC_SC_PLL0CFG_MSEL0_MUL373_value		372
#define LPC_SC_PLL0CFG_MSEL0_MUL374_value		373
#define LPC_SC_PLL0CFG_MSEL0_MUL375_value		374
#define LPC_SC_PLL0CFG_MSEL0_MUL376_value		375
#define LPC_SC_PLL0CFG_MSEL0_MUL377_value		376
#define LPC_SC_PLL0CFG_MSEL0_MUL378_value		377
#define LPC_SC_PLL0CFG_MSEL0_MUL379_value		378
#define LPC_SC_PLL0CFG_MSEL0_MUL380_value		379
#define LPC_SC_PLL0CFG_MSEL0_MUL381_value		380
#define LPC_SC_PLL0CFG_MSEL0_MUL382_value		381
#define LPC_SC_PLL0CFG_MSEL0_MUL383_value		382
#define LPC_SC_PLL0CFG_MSEL0_MUL384_value		383
#define LPC_SC_PLL0CFG_MSEL0_MUL385_value		384
#define LPC_SC_PLL0CFG_MSEL0_MUL386_value		385
#define LPC_SC_PLL0CFG_MSEL0_MUL387_value		386
#define LPC_SC_PLL0CFG_MSEL0_MUL388_value		387
#define LPC_SC_PLL0CFG_MSEL0_MUL389_value		388
#define LPC_SC_PLL0CFG_MSEL0_MUL390_value		389
#define LPC_SC_PLL0CFG_MSEL0_MUL391_value		390
#define LPC_SC_PLL0CFG_MSEL0_MUL392_value		391
#define LPC_SC_PLL0CFG_MSEL0_MUL393_value		392
#define LPC_SC_PLL0CFG_MSEL0_MUL394_value		393
#define LPC_SC_PLL0CFG_MSEL0_MUL395_value		394
#define LPC_SC_PLL0CFG_MSEL0_MUL396_value		395
#define LPC_SC_PLL0CFG_MSEL0_MUL397_value		396
#define LPC_SC_PLL0CFG_MSEL0_MUL398_value		397
#define LPC_SC_PLL0CFG_MSEL0_MUL399_value		398
#define LPC_SC_PLL0CFG_MSEL0_MUL400_value		399
#define LPC_SC_PLL0CFG_MSEL0_MUL401_value		400
#define LPC_SC_PLL0CFG_MSEL0_MUL402_value		401
#define LPC_SC_PLL0CFG_MSEL0_MUL403_value		402
#define LPC_SC_PLL0CFG_MSEL0_MUL404_value		403
#define LPC_SC_PLL0CFG_MSEL0_MUL405_value		404
#define LPC_SC_PLL0CFG_MSEL0_MUL406_value		405
#define LPC_SC_PLL0CFG_MSEL0_MUL407_value		406
#define LPC_SC_PLL0CFG_MSEL0_MUL408_value		407
#define LPC_SC_PLL0CFG_MSEL0_MUL409_value		408
#define LPC_SC_PLL0CFG_MSEL0_MUL410_value		409
#define LPC_SC_PLL0CFG_MSEL0_MUL411_value		410
#define LPC_SC_PLL0CFG_MSEL0_MUL412_value		411
#define LPC_SC_PLL0CFG_MSEL0_MUL413_value		412
#define LPC_SC_PLL0CFG_MSEL0_MUL414_value		413
#define LPC_SC_PLL0CFG_MSEL0_MUL415_value		414
#define LPC_SC_PLL0CFG_MSEL0_MUL416_value		415
#define LPC_SC_PLL0CFG_MSEL0_MUL417_value		416
#define LPC_SC_PLL0CFG_MSEL0_MUL418_value		417
#define LPC_SC_PLL0CFG_MSEL0_MUL419_value		418
#define LPC_SC_PLL0CFG_MSEL0_MUL420_value		419
#define LPC_SC_PLL0CFG_MSEL0_MUL421_value		420
#define LPC_SC_PLL0CFG_MSEL0_MUL422_value		421
#define LPC_SC_PLL0CFG_MSEL0_MUL423_value		422
#define LPC_SC_PLL0CFG_MSEL0_MUL424_value		423
#define LPC_SC_PLL0CFG_MSEL0_MUL425_value		424
#define LPC_SC_PLL0CFG_MSEL0_MUL426_value		425
#define LPC_SC_PLL0CFG_MSEL0_MUL427_value		426
#define LPC_SC_PLL0CFG_MSEL0_MUL428_value		427
#define LPC_SC_PLL0CFG_MSEL0_MUL429_value		428
#define LPC_SC_PLL0CFG_MSEL0_MUL430_value		429
#define LPC_SC_PLL0CFG_MSEL0_MUL431_value		430
#define LPC_SC_PLL0CFG_MSEL0_MUL432_value		431
#define LPC_SC_PLL0CFG_MSEL0_MUL433_value		432
#define LPC_SC_PLL0CFG_MSEL0_MUL434_value		433
#define LPC_SC_PLL0CFG_MSEL0_MUL435_value		434
#define LPC_SC_PLL0CFG_MSEL0_MUL436_value		435
#define LPC_SC_PLL0CFG_MSEL0_MUL437_value		436
#define LPC_SC_PLL0CFG_MSEL0_MUL438_value		437
#define LPC_SC_PLL0CFG_MSEL0_MUL439_value		438
#define LPC_SC_PLL0CFG_MSEL0_MUL440_value		439
#define LPC_SC_PLL0CFG_MSEL0_MUL441_value		440
#define LPC_SC_PLL0CFG_MSEL0_MUL442_value		441
#define LPC_SC_PLL0CFG_MSEL0_MUL443_value		442
#define LPC_SC_PLL0CFG_MSEL0_MUL444_value		443
#define LPC_SC_PLL0CFG_MSEL0_MUL445_value		444
#define LPC_SC_PLL0CFG_MSEL0_MUL446_value		445
#define LPC_SC_PLL0CFG_MSEL0_MUL447_value		446
#define LPC_SC_PLL0CFG_MSEL0_MUL448_value		447
#define LPC_SC_PLL0CFG_MSEL0_MUL449_value		448
#define LPC_SC_PLL0CFG_MSEL0_MUL450_value		449
#define LPC_SC_PLL0CFG_MSEL0_MUL451_value		450
#define LPC_SC_PLL0CFG_MSEL0_MUL452_value		451
#define LPC_SC_PLL0CFG_MSEL0_MUL453_value		452
#define LPC_SC_PLL0CFG_MSEL0_MUL454_value		453
#define LPC_SC_PLL0CFG_MSEL0_MUL455_value		454
#define LPC_SC_PLL0CFG_MSEL0_MUL456_value		455
#define LPC_SC_PLL0CFG_MSEL0_MUL457_value		456
#define LPC_SC_PLL0CFG_MSEL0_MUL458_value		457
#define LPC_SC_PLL0CFG_MSEL0_MUL459_value		458
#define LPC_SC_PLL0CFG_MSEL0_MUL460_value		459
#define LPC_SC_PLL0CFG_MSEL0_MUL461_value		460
#define LPC_SC_PLL0CFG_MSEL0_MUL462_value		461
#define LPC_SC_PLL0CFG_MSEL0_MUL463_value		462
#define LPC_SC_PLL0CFG_MSEL0_MUL464_value		463
#define LPC_SC_PLL0CFG_MSEL0_MUL465_value		464
#define LPC_SC_PLL0CFG_MSEL0_MUL466_value		465
#define LPC_SC_PLL0CFG_MSEL0_MUL467_value		466
#define LPC_SC_PLL0CFG_MSEL0_MUL468_value		467
#define LPC_SC_PLL0CFG_MSEL0_MUL469_value		468
#define LPC_SC_PLL0CFG_MSEL0_MUL470_value		469
#define LPC_SC_PLL0CFG_MSEL0_MUL471_value		470
#define LPC_SC_PLL0CFG_MSEL0_MUL472_value		471
#define LPC_SC_PLL0CFG_MSEL0_MUL473_value		472
#define LPC_SC_PLL0CFG_MSEL0_MUL474_value		473
#define LPC_SC_PLL0CFG_MSEL0_MUL475_value		474
#define LPC_SC_PLL0CFG_MSEL0_MUL476_value		475
#define LPC_SC_PLL0CFG_MSEL0_MUL477_value		476
#define LPC_SC_PLL0CFG_MSEL0_MUL478_value		477
#define LPC_SC_PLL0CFG_MSEL0_MUL479_value		478
#define LPC_SC_PLL0CFG_MSEL0_MUL480_value		479
#define LPC_SC_PLL0CFG_MSEL0_MUL481_value		480
#define LPC_SC_PLL0CFG_MSEL0_MUL482_value		481
#define LPC_SC_PLL0CFG_MSEL0_MUL483_value		482
#define LPC_SC_PLL0CFG_MSEL0_MUL484_value		483
#define LPC_SC_PLL0CFG_MSEL0_MUL485_value		484
#define LPC_SC_PLL0CFG_MSEL0_MUL486_value		485
#define LPC_SC_PLL0CFG_MSEL0_MUL487_value		486
#define LPC_SC_PLL0CFG_MSEL0_MUL488_value		487
#define LPC_SC_PLL0CFG_MSEL0_MUL489_value		488
#define LPC_SC_PLL0CFG_MSEL0_MUL490_value		489
#define LPC_SC_PLL0CFG_MSEL0_MUL491_value		490
#define LPC_SC_PLL0CFG_MSEL0_MUL492_value		491
#define LPC_SC_PLL0CFG_MSEL0_MUL493_value		492
#define LPC_SC_PLL0CFG_MSEL0_MUL494_value		493
#define LPC_SC_PLL0CFG_MSEL0_MUL495_value		494
#define LPC_SC_PLL0CFG_MSEL0_MUL496_value		495
#define LPC_SC_PLL0CFG_MSEL0_MUL497_value		496
#define LPC_SC_PLL0CFG_MSEL0_MUL498_value		497
#define LPC_SC_PLL0CFG_MSEL0_MUL499_value		498
#define LPC_SC_PLL0CFG_MSEL0_MUL500_value		499
#define LPC_SC_PLL0CFG_MSEL0_MUL501_value		500
#define LPC_SC_PLL0CFG_MSEL0_MUL502_value		501
#define LPC_SC_PLL0CFG_MSEL0_MUL503_value		502
#define LPC_SC_PLL0CFG_MSEL0_MUL504_value		503
#define LPC_SC_PLL0CFG_MSEL0_MUL505_value		504
#define LPC_SC_PLL0CFG_MSEL0_MUL506_value		505
#define LPC_SC_PLL0CFG_MSEL0_MUL507_value		506
#define LPC_SC_PLL0CFG_MSEL0_MUL508_value		507
#define LPC_SC_PLL0CFG_MSEL0_MUL509_value		508
#define LPC_SC_PLL0CFG_MSEL0_MUL510_value		509
#define LPC_SC_PLL0CFG_MSEL0_MUL511_value		510
#define LPC_SC_PLL0CFG_MSEL0_MUL512_value		511
#define LPC_SC_PLL0CFG_MSEL0_MUL4272_value		4271
#define LPC_SC_PLL0CFG_MSEL0_MUL4395_value		4394
#define LPC_SC_PLL0CFG_MSEL0_MUL4578_value		4577
#define LPC_SC_PLL0CFG_MSEL0_MUL4725_value		4724
#define LPC_SC_PLL0CFG_MSEL0_MUL4807_value		4806
#define LPC_SC_PLL0CFG_MSEL0_MUL5127_value		5126
#define LPC_SC_PLL0CFG_MSEL0_MUL5188_value		5187
#define LPC_SC_PLL0CFG_MSEL0_MUL5400_value		5399
#define LPC_SC_PLL0CFG_MSEL0_MUL5493_value		5492
#define LPC_SC_PLL0CFG_MSEL0_MUL5859_value		5858
#define LPC_SC_PLL0CFG_MSEL0_MUL6042_value		6041
#define LPC_SC_PLL0CFG_MSEL0_MUL6075_value		6074
#define LPC_SC_PLL0CFG_MSEL0_MUL6104_value		6103
#define LPC_SC_PLL0CFG_MSEL0_MUL6409_value		6408
#define LPC_SC_PLL0CFG_MSEL0_MUL6592_value		6591
#define LPC_SC_PLL0CFG_MSEL0_MUL6750_value		6749
#define LPC_SC_PLL0CFG_MSEL0_MUL6836_value		6835
#define LPC_SC_PLL0CFG_MSEL0_MUL6866_value		6865
#define LPC_SC_PLL0CFG_MSEL0_MUL6958_value		6957
#define LPC_SC_PLL0CFG_MSEL0_MUL7050_value		7049
#define LPC_SC_PLL0CFG_MSEL0_MUL7324_value		7323
#define LPC_SC_PLL0CFG_MSEL0_MUL7425_value		7424
#define LPC_SC_PLL0CFG_MSEL0_MUL7690_value		7689
#define LPC_SC_PLL0CFG_MSEL0_MUL7813_value		7812
#define LPC_SC_PLL0CFG_MSEL0_MUL7935_value		7934
#define LPC_SC_PLL0CFG_MSEL0_MUL8057_value		8056
#define LPC_SC_PLL0CFG_MSEL0_MUL8100_value		8099
#define LPC_SC_PLL0CFG_MSEL0_MUL8545_value		8544
#define LPC_SC_PLL0CFG_MSEL0_MUL8789_value		8788
#define LPC_SC_PLL0CFG_MSEL0_MUL9155_value		9154
#define LPC_SC_PLL0CFG_MSEL0_MUL9613_value		9612
#define LPC_SC_PLL0CFG_MSEL0_MUL10254_value		10253
#define LPC_SC_PLL0CFG_MSEL0_MUL10376_value		10375
#define LPC_SC_PLL0CFG_MSEL0_MUL10986_value		10985
#define LPC_SC_PLL0CFG_MSEL0_MUL11719_value		11718
#define LPC_SC_PLL0CFG_MSEL0_MUL12085_value		12084
#define LPC_SC_PLL0CFG_MSEL0_MUL12207_value		12206
#define LPC_SC_PLL0CFG_MSEL0_MUL12817_value		12816
#define LPC_SC_PLL0CFG_MSEL0_MUL13184_value		13183
#define LPC_SC_PLL0CFG_MSEL0_MUL13672_value		13671
#define LPC_SC_PLL0CFG_MSEL0_MUL13733_value		13732
#define LPC_SC_PLL0CFG_MSEL0_MUL13916_value		13915
#define LPC_SC_PLL0CFG_MSEL0_MUL14099_value		14098
#define LPC_SC_PLL0CFG_MSEL0_MUL14420_value		14419
#define LPC_SC_PLL0CFG_MSEL0_MUL14648_value		14647
#define LPC_SC_PLL0CFG_MSEL0_MUL15381_value		15380
#define LPC_SC_PLL0CFG_MSEL0_MUL15564_value		15563
#define LPC_SC_PLL0CFG_MSEL0_MUL15625_value		15624
#define LPC_SC_PLL0CFG_MSEL0_MUL15869_value		15868
#define LPC_SC_PLL0CFG_MSEL0_MUL16113_value		16112
#define LPC_SC_PLL0CFG_MSEL0_MUL16479_value		16478
#define LPC_SC_PLL0CFG_MSEL0_MUL17578_value		17577
#define LPC_SC_PLL0CFG_MSEL0_MUL18127_value		18126
#define LPC_SC_PLL0CFG_MSEL0_MUL18311_value		18310
#define LPC_SC_PLL0CFG_MSEL0_MUL19226_value		19225
#define LPC_SC_PLL0CFG_MSEL0_MUL19775_value		19774
#define LPC_SC_PLL0CFG_MSEL0_MUL20508_value		20507
#define LPC_SC_PLL0CFG_MSEL0_MUL20599_value		20598
#define LPC_SC_PLL0CFG_MSEL0_MUL20874_value		20873
#define LPC_SC_PLL0CFG_MSEL0_MUL21149_value		21148
#define LPC_SC_PLL0CFG_MSEL0_MUL21973_value		21972
#define LPC_SC_PLL0CFG_MSEL0_MUL23071_value		23070
#define LPC_SC_PLL0CFG_MSEL0_MUL23438_value		23437
#define LPC_SC_PLL0CFG_MSEL0_MUL23804_value		23803
#define LPC_SC_PLL0CFG_MSEL0_MUL24170_value		24169
#define LPC_SC_PLL0CFG_MSEL0_mask				32767

#define LPC_SC_PLL0CFG_NSEL0_DIV1_value			0
#define LPC_SC_PLL0CFG_NSEL0_DIV2_value			1
#define LPC_SC_PLL0CFG_NSEL0_DIV3_value			2
#define LPC_SC_PLL0CFG_NSEL0_DIV4_value			3
#define LPC_SC_PLL0CFG_NSEL0_DIV5_value			4
#define LPC_SC_PLL0CFG_NSEL0_DIV6_value			5
#define LPC_SC_PLL0CFG_NSEL0_DIV7_value			6
#define LPC_SC_PLL0CFG_NSEL0_DIV8_value			7
#define LPC_SC_PLL0CFG_NSEL0_DIV9_value			8
#define LPC_SC_PLL0CFG_NSEL0_DIV10_value		9
#define LPC_SC_PLL0CFG_NSEL0_DIV11_value		10
#define LPC_SC_PLL0CFG_NSEL0_DIV12_value		11
#define LPC_SC_PLL0CFG_NSEL0_DIV13_value		12
#define LPC_SC_PLL0CFG_NSEL0_DIV14_value		13
#define LPC_SC_PLL0CFG_NSEL0_DIV15_value		14
#define LPC_SC_PLL0CFG_NSEL0_DIV16_value		15
#define LPC_SC_PLL0CFG_NSEL0_DIV17_value		16
#define LPC_SC_PLL0CFG_NSEL0_DIV18_value		17
#define LPC_SC_PLL0CFG_NSEL0_DIV19_value		18
#define LPC_SC_PLL0CFG_NSEL0_DIV20_value		19
#define LPC_SC_PLL0CFG_NSEL0_DIV21_value		20
#define LPC_SC_PLL0CFG_NSEL0_DIV22_value		21
#define LPC_SC_PLL0CFG_NSEL0_DIV23_value		22
#define LPC_SC_PLL0CFG_NSEL0_DIV24_value		23
#define LPC_SC_PLL0CFG_NSEL0_DIV25_value		24
#define LPC_SC_PLL0CFG_NSEL0_DIV26_value		25
#define LPC_SC_PLL0CFG_NSEL0_DIV27_value		26
#define LPC_SC_PLL0CFG_NSEL0_DIV28_value		27
#define LPC_SC_PLL0CFG_NSEL0_DIV29_value		28
#define LPC_SC_PLL0CFG_NSEL0_DIV30_value		29
#define LPC_SC_PLL0CFG_NSEL0_DIV31_value		30
#define LPC_SC_PLL0CFG_NSEL0_DIV32_value		31
#define LPC_SC_PLL0CFG_NSEL0_mask				255

#define LPC_SC_PLL0CFG_MSEL0_MUL6				(LPC_SC_PLL0CFG_MSEL0_MUL6_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7				(LPC_SC_PLL0CFG_MSEL0_MUL7_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL8				(LPC_SC_PLL0CFG_MSEL0_MUL8_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL9				(LPC_SC_PLL0CFG_MSEL0_MUL9_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL10				(LPC_SC_PLL0CFG_MSEL0_MUL10_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL11				(LPC_SC_PLL0CFG_MSEL0_MUL11_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL12				(LPC_SC_PLL0CFG_MSEL0_MUL12_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL13				(LPC_SC_PLL0CFG_MSEL0_MUL13_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL14				(LPC_SC_PLL0CFG_MSEL0_MUL14_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL15				(LPC_SC_PLL0CFG_MSEL0_MUL15_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL16				(LPC_SC_PLL0CFG_MSEL0_MUL16_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL17				(LPC_SC_PLL0CFG_MSEL0_MUL17_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL18				(LPC_SC_PLL0CFG_MSEL0_MUL18_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL19				(LPC_SC_PLL0CFG_MSEL0_MUL19_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL20				(LPC_SC_PLL0CFG_MSEL0_MUL20_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL21				(LPC_SC_PLL0CFG_MSEL0_MUL21_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL22				(LPC_SC_PLL0CFG_MSEL0_MUL22_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL23				(LPC_SC_PLL0CFG_MSEL0_MUL23_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL24				(LPC_SC_PLL0CFG_MSEL0_MUL24_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL25				(LPC_SC_PLL0CFG_MSEL0_MUL25_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL26				(LPC_SC_PLL0CFG_MSEL0_MUL26_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL27				(LPC_SC_PLL0CFG_MSEL0_MUL27_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL28				(LPC_SC_PLL0CFG_MSEL0_MUL28_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL29				(LPC_SC_PLL0CFG_MSEL0_MUL29_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL30				(LPC_SC_PLL0CFG_MSEL0_MUL30_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL31				(LPC_SC_PLL0CFG_MSEL0_MUL31_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL32				(LPC_SC_PLL0CFG_MSEL0_MUL32_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL33				(LPC_SC_PLL0CFG_MSEL0_MUL33_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL34				(LPC_SC_PLL0CFG_MSEL0_MUL34_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL35				(LPC_SC_PLL0CFG_MSEL0_MUL35_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL36				(LPC_SC_PLL0CFG_MSEL0_MUL36_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL37				(LPC_SC_PLL0CFG_MSEL0_MUL37_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL38				(LPC_SC_PLL0CFG_MSEL0_MUL38_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL39				(LPC_SC_PLL0CFG_MSEL0_MUL39_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL40				(LPC_SC_PLL0CFG_MSEL0_MUL40_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL41				(LPC_SC_PLL0CFG_MSEL0_MUL41_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL42				(LPC_SC_PLL0CFG_MSEL0_MUL42_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL43				(LPC_SC_PLL0CFG_MSEL0_MUL43_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL44				(LPC_SC_PLL0CFG_MSEL0_MUL44_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL45				(LPC_SC_PLL0CFG_MSEL0_MUL45_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL46				(LPC_SC_PLL0CFG_MSEL0_MUL46_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL47				(LPC_SC_PLL0CFG_MSEL0_MUL47_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL48				(LPC_SC_PLL0CFG_MSEL0_MUL48_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL49				(LPC_SC_PLL0CFG_MSEL0_MUL49_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL50				(LPC_SC_PLL0CFG_MSEL0_MUL50_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL51				(LPC_SC_PLL0CFG_MSEL0_MUL51_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL52				(LPC_SC_PLL0CFG_MSEL0_MUL52_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL53				(LPC_SC_PLL0CFG_MSEL0_MUL53_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL54				(LPC_SC_PLL0CFG_MSEL0_MUL54_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL55				(LPC_SC_PLL0CFG_MSEL0_MUL55_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL56				(LPC_SC_PLL0CFG_MSEL0_MUL56_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL57				(LPC_SC_PLL0CFG_MSEL0_MUL57_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL58				(LPC_SC_PLL0CFG_MSEL0_MUL58_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL59				(LPC_SC_PLL0CFG_MSEL0_MUL59_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL60				(LPC_SC_PLL0CFG_MSEL0_MUL60_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL61				(LPC_SC_PLL0CFG_MSEL0_MUL61_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL62				(LPC_SC_PLL0CFG_MSEL0_MUL62_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL63				(LPC_SC_PLL0CFG_MSEL0_MUL63_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL64				(LPC_SC_PLL0CFG_MSEL0_MUL64_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL65				(LPC_SC_PLL0CFG_MSEL0_MUL65_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL66				(LPC_SC_PLL0CFG_MSEL0_MUL66_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL67				(LPC_SC_PLL0CFG_MSEL0_MUL67_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL68				(LPC_SC_PLL0CFG_MSEL0_MUL68_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL69				(LPC_SC_PLL0CFG_MSEL0_MUL69_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL70				(LPC_SC_PLL0CFG_MSEL0_MUL70_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL71				(LPC_SC_PLL0CFG_MSEL0_MUL71_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL72				(LPC_SC_PLL0CFG_MSEL0_MUL72_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL73				(LPC_SC_PLL0CFG_MSEL0_MUL73_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL74				(LPC_SC_PLL0CFG_MSEL0_MUL74_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL75				(LPC_SC_PLL0CFG_MSEL0_MUL75_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL76				(LPC_SC_PLL0CFG_MSEL0_MUL76_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL77				(LPC_SC_PLL0CFG_MSEL0_MUL77_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL78				(LPC_SC_PLL0CFG_MSEL0_MUL78_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL79				(LPC_SC_PLL0CFG_MSEL0_MUL79_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL80				(LPC_SC_PLL0CFG_MSEL0_MUL80_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL81				(LPC_SC_PLL0CFG_MSEL0_MUL81_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL82				(LPC_SC_PLL0CFG_MSEL0_MUL82_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL83				(LPC_SC_PLL0CFG_MSEL0_MUL83_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL84				(LPC_SC_PLL0CFG_MSEL0_MUL84_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL85				(LPC_SC_PLL0CFG_MSEL0_MUL85_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL86				(LPC_SC_PLL0CFG_MSEL0_MUL86_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL87				(LPC_SC_PLL0CFG_MSEL0_MUL87_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL88				(LPC_SC_PLL0CFG_MSEL0_MUL88_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL89				(LPC_SC_PLL0CFG_MSEL0_MUL89_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL90				(LPC_SC_PLL0CFG_MSEL0_MUL90_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL91				(LPC_SC_PLL0CFG_MSEL0_MUL91_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL92				(LPC_SC_PLL0CFG_MSEL0_MUL92_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL93				(LPC_SC_PLL0CFG_MSEL0_MUL93_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL94				(LPC_SC_PLL0CFG_MSEL0_MUL94_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL95				(LPC_SC_PLL0CFG_MSEL0_MUL95_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL96				(LPC_SC_PLL0CFG_MSEL0_MUL96_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL97				(LPC_SC_PLL0CFG_MSEL0_MUL97_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL98				(LPC_SC_PLL0CFG_MSEL0_MUL98_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL99				(LPC_SC_PLL0CFG_MSEL0_MUL99_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL100				(LPC_SC_PLL0CFG_MSEL0_MUL100_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL101				(LPC_SC_PLL0CFG_MSEL0_MUL101_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL102				(LPC_SC_PLL0CFG_MSEL0_MUL102_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL103				(LPC_SC_PLL0CFG_MSEL0_MUL103_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL104				(LPC_SC_PLL0CFG_MSEL0_MUL104_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL105				(LPC_SC_PLL0CFG_MSEL0_MUL105_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL106				(LPC_SC_PLL0CFG_MSEL0_MUL106_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL107				(LPC_SC_PLL0CFG_MSEL0_MUL107_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL108				(LPC_SC_PLL0CFG_MSEL0_MUL108_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL109				(LPC_SC_PLL0CFG_MSEL0_MUL109_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL110				(LPC_SC_PLL0CFG_MSEL0_MUL110_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL111				(LPC_SC_PLL0CFG_MSEL0_MUL111_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL112				(LPC_SC_PLL0CFG_MSEL0_MUL112_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL113				(LPC_SC_PLL0CFG_MSEL0_MUL113_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL114				(LPC_SC_PLL0CFG_MSEL0_MUL114_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL115				(LPC_SC_PLL0CFG_MSEL0_MUL115_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL116				(LPC_SC_PLL0CFG_MSEL0_MUL116_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL117				(LPC_SC_PLL0CFG_MSEL0_MUL117_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL118				(LPC_SC_PLL0CFG_MSEL0_MUL118_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL119				(LPC_SC_PLL0CFG_MSEL0_MUL119_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL120				(LPC_SC_PLL0CFG_MSEL0_MUL120_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL121				(LPC_SC_PLL0CFG_MSEL0_MUL121_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL122				(LPC_SC_PLL0CFG_MSEL0_MUL122_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL123				(LPC_SC_PLL0CFG_MSEL0_MUL123_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL124				(LPC_SC_PLL0CFG_MSEL0_MUL124_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL125				(LPC_SC_PLL0CFG_MSEL0_MUL125_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL126				(LPC_SC_PLL0CFG_MSEL0_MUL126_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL127				(LPC_SC_PLL0CFG_MSEL0_MUL127_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL128				(LPC_SC_PLL0CFG_MSEL0_MUL128_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL129				(LPC_SC_PLL0CFG_MSEL0_MUL129_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL130				(LPC_SC_PLL0CFG_MSEL0_MUL130_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL131				(LPC_SC_PLL0CFG_MSEL0_MUL131_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL132				(LPC_SC_PLL0CFG_MSEL0_MUL132_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL133				(LPC_SC_PLL0CFG_MSEL0_MUL133_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL134				(LPC_SC_PLL0CFG_MSEL0_MUL134_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL135				(LPC_SC_PLL0CFG_MSEL0_MUL135_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL136				(LPC_SC_PLL0CFG_MSEL0_MUL136_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL137				(LPC_SC_PLL0CFG_MSEL0_MUL137_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL138				(LPC_SC_PLL0CFG_MSEL0_MUL138_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL139				(LPC_SC_PLL0CFG_MSEL0_MUL139_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL140				(LPC_SC_PLL0CFG_MSEL0_MUL140_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL141				(LPC_SC_PLL0CFG_MSEL0_MUL141_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL142				(LPC_SC_PLL0CFG_MSEL0_MUL142_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL143				(LPC_SC_PLL0CFG_MSEL0_MUL143_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL144				(LPC_SC_PLL0CFG_MSEL0_MUL144_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL145				(LPC_SC_PLL0CFG_MSEL0_MUL145_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL146				(LPC_SC_PLL0CFG_MSEL0_MUL146_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL147				(LPC_SC_PLL0CFG_MSEL0_MUL147_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL148				(LPC_SC_PLL0CFG_MSEL0_MUL148_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL149				(LPC_SC_PLL0CFG_MSEL0_MUL149_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL150				(LPC_SC_PLL0CFG_MSEL0_MUL150_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL151				(LPC_SC_PLL0CFG_MSEL0_MUL151_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL152				(LPC_SC_PLL0CFG_MSEL0_MUL152_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL153				(LPC_SC_PLL0CFG_MSEL0_MUL153_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL154				(LPC_SC_PLL0CFG_MSEL0_MUL154_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL155				(LPC_SC_PLL0CFG_MSEL0_MUL155_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL156				(LPC_SC_PLL0CFG_MSEL0_MUL156_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL157				(LPC_SC_PLL0CFG_MSEL0_MUL157_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL158				(LPC_SC_PLL0CFG_MSEL0_MUL158_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL159				(LPC_SC_PLL0CFG_MSEL0_MUL159_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL160				(LPC_SC_PLL0CFG_MSEL0_MUL160_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL161				(LPC_SC_PLL0CFG_MSEL0_MUL161_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL162				(LPC_SC_PLL0CFG_MSEL0_MUL162_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL163				(LPC_SC_PLL0CFG_MSEL0_MUL163_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL164				(LPC_SC_PLL0CFG_MSEL0_MUL164_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL165				(LPC_SC_PLL0CFG_MSEL0_MUL165_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL166				(LPC_SC_PLL0CFG_MSEL0_MUL166_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL167				(LPC_SC_PLL0CFG_MSEL0_MUL167_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL168				(LPC_SC_PLL0CFG_MSEL0_MUL168_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL169				(LPC_SC_PLL0CFG_MSEL0_MUL169_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL170				(LPC_SC_PLL0CFG_MSEL0_MUL170_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL171				(LPC_SC_PLL0CFG_MSEL0_MUL171_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL172				(LPC_SC_PLL0CFG_MSEL0_MUL172_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL173				(LPC_SC_PLL0CFG_MSEL0_MUL173_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL174				(LPC_SC_PLL0CFG_MSEL0_MUL174_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL175				(LPC_SC_PLL0CFG_MSEL0_MUL175_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL176				(LPC_SC_PLL0CFG_MSEL0_MUL176_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL177				(LPC_SC_PLL0CFG_MSEL0_MUL177_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL178				(LPC_SC_PLL0CFG_MSEL0_MUL178_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL179				(LPC_SC_PLL0CFG_MSEL0_MUL179_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL180				(LPC_SC_PLL0CFG_MSEL0_MUL180_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL181				(LPC_SC_PLL0CFG_MSEL0_MUL181_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL182				(LPC_SC_PLL0CFG_MSEL0_MUL182_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL183				(LPC_SC_PLL0CFG_MSEL0_MUL183_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL184				(LPC_SC_PLL0CFG_MSEL0_MUL184_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL185				(LPC_SC_PLL0CFG_MSEL0_MUL185_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL186				(LPC_SC_PLL0CFG_MSEL0_MUL186_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL187				(LPC_SC_PLL0CFG_MSEL0_MUL187_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL188				(LPC_SC_PLL0CFG_MSEL0_MUL188_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL189				(LPC_SC_PLL0CFG_MSEL0_MUL189_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL190				(LPC_SC_PLL0CFG_MSEL0_MUL190_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL191				(LPC_SC_PLL0CFG_MSEL0_MUL191_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL192				(LPC_SC_PLL0CFG_MSEL0_MUL192_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL193				(LPC_SC_PLL0CFG_MSEL0_MUL193_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL194				(LPC_SC_PLL0CFG_MSEL0_MUL194_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL195				(LPC_SC_PLL0CFG_MSEL0_MUL195_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL196				(LPC_SC_PLL0CFG_MSEL0_MUL196_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL197				(LPC_SC_PLL0CFG_MSEL0_MUL197_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL198				(LPC_SC_PLL0CFG_MSEL0_MUL198_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL199				(LPC_SC_PLL0CFG_MSEL0_MUL199_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL200				(LPC_SC_PLL0CFG_MSEL0_MUL200_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL201				(LPC_SC_PLL0CFG_MSEL0_MUL201_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL202				(LPC_SC_PLL0CFG_MSEL0_MUL202_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL203				(LPC_SC_PLL0CFG_MSEL0_MUL203_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL204				(LPC_SC_PLL0CFG_MSEL0_MUL204_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL205				(LPC_SC_PLL0CFG_MSEL0_MUL205_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL206				(LPC_SC_PLL0CFG_MSEL0_MUL206_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL207				(LPC_SC_PLL0CFG_MSEL0_MUL207_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL208				(LPC_SC_PLL0CFG_MSEL0_MUL208_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL209				(LPC_SC_PLL0CFG_MSEL0_MUL209_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL210				(LPC_SC_PLL0CFG_MSEL0_MUL210_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL211				(LPC_SC_PLL0CFG_MSEL0_MUL211_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL212				(LPC_SC_PLL0CFG_MSEL0_MUL212_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL213				(LPC_SC_PLL0CFG_MSEL0_MUL213_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL214				(LPC_SC_PLL0CFG_MSEL0_MUL214_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL215				(LPC_SC_PLL0CFG_MSEL0_MUL215_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL216				(LPC_SC_PLL0CFG_MSEL0_MUL216_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL217				(LPC_SC_PLL0CFG_MSEL0_MUL217_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL218				(LPC_SC_PLL0CFG_MSEL0_MUL218_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL219				(LPC_SC_PLL0CFG_MSEL0_MUL219_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL220				(LPC_SC_PLL0CFG_MSEL0_MUL220_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL221				(LPC_SC_PLL0CFG_MSEL0_MUL221_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL222				(LPC_SC_PLL0CFG_MSEL0_MUL222_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL223				(LPC_SC_PLL0CFG_MSEL0_MUL223_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL224				(LPC_SC_PLL0CFG_MSEL0_MUL224_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL225				(LPC_SC_PLL0CFG_MSEL0_MUL225_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL226				(LPC_SC_PLL0CFG_MSEL0_MUL226_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL227				(LPC_SC_PLL0CFG_MSEL0_MUL227_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL228				(LPC_SC_PLL0CFG_MSEL0_MUL228_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL229				(LPC_SC_PLL0CFG_MSEL0_MUL229_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL230				(LPC_SC_PLL0CFG_MSEL0_MUL230_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL231				(LPC_SC_PLL0CFG_MSEL0_MUL231_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL232				(LPC_SC_PLL0CFG_MSEL0_MUL232_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL233				(LPC_SC_PLL0CFG_MSEL0_MUL233_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL234				(LPC_SC_PLL0CFG_MSEL0_MUL234_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL235				(LPC_SC_PLL0CFG_MSEL0_MUL235_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL236				(LPC_SC_PLL0CFG_MSEL0_MUL236_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL237				(LPC_SC_PLL0CFG_MSEL0_MUL237_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL238				(LPC_SC_PLL0CFG_MSEL0_MUL238_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL239				(LPC_SC_PLL0CFG_MSEL0_MUL239_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL240				(LPC_SC_PLL0CFG_MSEL0_MUL240_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL241				(LPC_SC_PLL0CFG_MSEL0_MUL241_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL242				(LPC_SC_PLL0CFG_MSEL0_MUL242_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL243				(LPC_SC_PLL0CFG_MSEL0_MUL243_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL244				(LPC_SC_PLL0CFG_MSEL0_MUL244_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL245				(LPC_SC_PLL0CFG_MSEL0_MUL245_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL246				(LPC_SC_PLL0CFG_MSEL0_MUL246_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL247				(LPC_SC_PLL0CFG_MSEL0_MUL247_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL248				(LPC_SC_PLL0CFG_MSEL0_MUL248_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL249				(LPC_SC_PLL0CFG_MSEL0_MUL249_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL250				(LPC_SC_PLL0CFG_MSEL0_MUL250_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL251				(LPC_SC_PLL0CFG_MSEL0_MUL251_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL252				(LPC_SC_PLL0CFG_MSEL0_MUL252_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL253				(LPC_SC_PLL0CFG_MSEL0_MUL253_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL254				(LPC_SC_PLL0CFG_MSEL0_MUL254_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL255				(LPC_SC_PLL0CFG_MSEL0_MUL255_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL256				(LPC_SC_PLL0CFG_MSEL0_MUL256_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL257				(LPC_SC_PLL0CFG_MSEL0_MUL257_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL258				(LPC_SC_PLL0CFG_MSEL0_MUL258_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL259				(LPC_SC_PLL0CFG_MSEL0_MUL259_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL260				(LPC_SC_PLL0CFG_MSEL0_MUL260_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL261				(LPC_SC_PLL0CFG_MSEL0_MUL261_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL262				(LPC_SC_PLL0CFG_MSEL0_MUL262_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL263				(LPC_SC_PLL0CFG_MSEL0_MUL263_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL264				(LPC_SC_PLL0CFG_MSEL0_MUL264_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL265				(LPC_SC_PLL0CFG_MSEL0_MUL265_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL266				(LPC_SC_PLL0CFG_MSEL0_MUL266_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL267				(LPC_SC_PLL0CFG_MSEL0_MUL267_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL268				(LPC_SC_PLL0CFG_MSEL0_MUL268_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL269				(LPC_SC_PLL0CFG_MSEL0_MUL269_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL270				(LPC_SC_PLL0CFG_MSEL0_MUL270_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL271				(LPC_SC_PLL0CFG_MSEL0_MUL271_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL272				(LPC_SC_PLL0CFG_MSEL0_MUL272_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL273				(LPC_SC_PLL0CFG_MSEL0_MUL273_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL274				(LPC_SC_PLL0CFG_MSEL0_MUL274_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL275				(LPC_SC_PLL0CFG_MSEL0_MUL275_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL276				(LPC_SC_PLL0CFG_MSEL0_MUL276_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL277				(LPC_SC_PLL0CFG_MSEL0_MUL277_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL278				(LPC_SC_PLL0CFG_MSEL0_MUL278_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL279				(LPC_SC_PLL0CFG_MSEL0_MUL279_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL280				(LPC_SC_PLL0CFG_MSEL0_MUL280_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL281				(LPC_SC_PLL0CFG_MSEL0_MUL281_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL282				(LPC_SC_PLL0CFG_MSEL0_MUL282_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL283				(LPC_SC_PLL0CFG_MSEL0_MUL283_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL284				(LPC_SC_PLL0CFG_MSEL0_MUL284_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL285				(LPC_SC_PLL0CFG_MSEL0_MUL285_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL286				(LPC_SC_PLL0CFG_MSEL0_MUL286_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL287				(LPC_SC_PLL0CFG_MSEL0_MUL287_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL288				(LPC_SC_PLL0CFG_MSEL0_MUL288_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL289				(LPC_SC_PLL0CFG_MSEL0_MUL289_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL290				(LPC_SC_PLL0CFG_MSEL0_MUL290_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL291				(LPC_SC_PLL0CFG_MSEL0_MUL291_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL292				(LPC_SC_PLL0CFG_MSEL0_MUL292_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL293				(LPC_SC_PLL0CFG_MSEL0_MUL293_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL294				(LPC_SC_PLL0CFG_MSEL0_MUL294_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL295				(LPC_SC_PLL0CFG_MSEL0_MUL295_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL296				(LPC_SC_PLL0CFG_MSEL0_MUL296_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL297				(LPC_SC_PLL0CFG_MSEL0_MUL297_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL298				(LPC_SC_PLL0CFG_MSEL0_MUL298_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL299				(LPC_SC_PLL0CFG_MSEL0_MUL299_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL300				(LPC_SC_PLL0CFG_MSEL0_MUL300_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL301				(LPC_SC_PLL0CFG_MSEL0_MUL301_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL302				(LPC_SC_PLL0CFG_MSEL0_MUL302_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL303				(LPC_SC_PLL0CFG_MSEL0_MUL303_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL304				(LPC_SC_PLL0CFG_MSEL0_MUL304_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL305				(LPC_SC_PLL0CFG_MSEL0_MUL305_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL306				(LPC_SC_PLL0CFG_MSEL0_MUL306_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL307				(LPC_SC_PLL0CFG_MSEL0_MUL307_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL308				(LPC_SC_PLL0CFG_MSEL0_MUL308_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL309				(LPC_SC_PLL0CFG_MSEL0_MUL309_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL310				(LPC_SC_PLL0CFG_MSEL0_MUL310_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL311				(LPC_SC_PLL0CFG_MSEL0_MUL311_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL312				(LPC_SC_PLL0CFG_MSEL0_MUL312_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL313				(LPC_SC_PLL0CFG_MSEL0_MUL313_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL314				(LPC_SC_PLL0CFG_MSEL0_MUL314_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL315				(LPC_SC_PLL0CFG_MSEL0_MUL315_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL316				(LPC_SC_PLL0CFG_MSEL0_MUL316_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL317				(LPC_SC_PLL0CFG_MSEL0_MUL317_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL318				(LPC_SC_PLL0CFG_MSEL0_MUL318_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL319				(LPC_SC_PLL0CFG_MSEL0_MUL319_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL320				(LPC_SC_PLL0CFG_MSEL0_MUL320_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL321				(LPC_SC_PLL0CFG_MSEL0_MUL321_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL322				(LPC_SC_PLL0CFG_MSEL0_MUL322_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL323				(LPC_SC_PLL0CFG_MSEL0_MUL323_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL324				(LPC_SC_PLL0CFG_MSEL0_MUL324_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL325				(LPC_SC_PLL0CFG_MSEL0_MUL325_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL326				(LPC_SC_PLL0CFG_MSEL0_MUL326_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL327				(LPC_SC_PLL0CFG_MSEL0_MUL327_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL328				(LPC_SC_PLL0CFG_MSEL0_MUL328_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL329				(LPC_SC_PLL0CFG_MSEL0_MUL329_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL330				(LPC_SC_PLL0CFG_MSEL0_MUL330_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL331				(LPC_SC_PLL0CFG_MSEL0_MUL331_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL332				(LPC_SC_PLL0CFG_MSEL0_MUL332_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL333				(LPC_SC_PLL0CFG_MSEL0_MUL333_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL334				(LPC_SC_PLL0CFG_MSEL0_MUL334_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL335				(LPC_SC_PLL0CFG_MSEL0_MUL335_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL336				(LPC_SC_PLL0CFG_MSEL0_MUL336_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL337				(LPC_SC_PLL0CFG_MSEL0_MUL337_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL338				(LPC_SC_PLL0CFG_MSEL0_MUL338_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL339				(LPC_SC_PLL0CFG_MSEL0_MUL339_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL340				(LPC_SC_PLL0CFG_MSEL0_MUL340_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL341				(LPC_SC_PLL0CFG_MSEL0_MUL341_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL342				(LPC_SC_PLL0CFG_MSEL0_MUL342_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL343				(LPC_SC_PLL0CFG_MSEL0_MUL343_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL344				(LPC_SC_PLL0CFG_MSEL0_MUL344_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL345				(LPC_SC_PLL0CFG_MSEL0_MUL345_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL346				(LPC_SC_PLL0CFG_MSEL0_MUL346_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL347				(LPC_SC_PLL0CFG_MSEL0_MUL347_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL348				(LPC_SC_PLL0CFG_MSEL0_MUL348_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL349				(LPC_SC_PLL0CFG_MSEL0_MUL349_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL350				(LPC_SC_PLL0CFG_MSEL0_MUL350_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL351				(LPC_SC_PLL0CFG_MSEL0_MUL351_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL352				(LPC_SC_PLL0CFG_MSEL0_MUL352_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL353				(LPC_SC_PLL0CFG_MSEL0_MUL353_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL354				(LPC_SC_PLL0CFG_MSEL0_MUL354_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL355				(LPC_SC_PLL0CFG_MSEL0_MUL355_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL356				(LPC_SC_PLL0CFG_MSEL0_MUL356_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL357				(LPC_SC_PLL0CFG_MSEL0_MUL357_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL358				(LPC_SC_PLL0CFG_MSEL0_MUL358_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL359				(LPC_SC_PLL0CFG_MSEL0_MUL359_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL360				(LPC_SC_PLL0CFG_MSEL0_MUL360_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL361				(LPC_SC_PLL0CFG_MSEL0_MUL361_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL362				(LPC_SC_PLL0CFG_MSEL0_MUL362_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL363				(LPC_SC_PLL0CFG_MSEL0_MUL363_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL364				(LPC_SC_PLL0CFG_MSEL0_MUL364_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL365				(LPC_SC_PLL0CFG_MSEL0_MUL365_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL366				(LPC_SC_PLL0CFG_MSEL0_MUL366_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL367				(LPC_SC_PLL0CFG_MSEL0_MUL367_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL368				(LPC_SC_PLL0CFG_MSEL0_MUL368_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL369				(LPC_SC_PLL0CFG_MSEL0_MUL369_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL370				(LPC_SC_PLL0CFG_MSEL0_MUL370_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL371				(LPC_SC_PLL0CFG_MSEL0_MUL371_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL372				(LPC_SC_PLL0CFG_MSEL0_MUL372_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL373				(LPC_SC_PLL0CFG_MSEL0_MUL373_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL374				(LPC_SC_PLL0CFG_MSEL0_MUL374_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL375				(LPC_SC_PLL0CFG_MSEL0_MUL375_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL376				(LPC_SC_PLL0CFG_MSEL0_MUL376_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL377				(LPC_SC_PLL0CFG_MSEL0_MUL377_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL378				(LPC_SC_PLL0CFG_MSEL0_MUL378_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL379				(LPC_SC_PLL0CFG_MSEL0_MUL379_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL380				(LPC_SC_PLL0CFG_MSEL0_MUL380_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL381				(LPC_SC_PLL0CFG_MSEL0_MUL381_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL382				(LPC_SC_PLL0CFG_MSEL0_MUL382_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL383				(LPC_SC_PLL0CFG_MSEL0_MUL383_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL384				(LPC_SC_PLL0CFG_MSEL0_MUL384_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL385				(LPC_SC_PLL0CFG_MSEL0_MUL385_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL386				(LPC_SC_PLL0CFG_MSEL0_MUL386_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL387				(LPC_SC_PLL0CFG_MSEL0_MUL387_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL388				(LPC_SC_PLL0CFG_MSEL0_MUL388_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL389				(LPC_SC_PLL0CFG_MSEL0_MUL389_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL390				(LPC_SC_PLL0CFG_MSEL0_MUL390_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL391				(LPC_SC_PLL0CFG_MSEL0_MUL391_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL392				(LPC_SC_PLL0CFG_MSEL0_MUL392_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL393				(LPC_SC_PLL0CFG_MSEL0_MUL393_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL394				(LPC_SC_PLL0CFG_MSEL0_MUL394_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL395				(LPC_SC_PLL0CFG_MSEL0_MUL395_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL396				(LPC_SC_PLL0CFG_MSEL0_MUL396_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL397				(LPC_SC_PLL0CFG_MSEL0_MUL397_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL398				(LPC_SC_PLL0CFG_MSEL0_MUL398_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL399				(LPC_SC_PLL0CFG_MSEL0_MUL399_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL400				(LPC_SC_PLL0CFG_MSEL0_MUL400_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL401				(LPC_SC_PLL0CFG_MSEL0_MUL401_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL402				(LPC_SC_PLL0CFG_MSEL0_MUL402_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL403				(LPC_SC_PLL0CFG_MSEL0_MUL403_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL404				(LPC_SC_PLL0CFG_MSEL0_MUL404_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL405				(LPC_SC_PLL0CFG_MSEL0_MUL405_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL406				(LPC_SC_PLL0CFG_MSEL0_MUL406_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL407				(LPC_SC_PLL0CFG_MSEL0_MUL407_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL408				(LPC_SC_PLL0CFG_MSEL0_MUL408_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL409				(LPC_SC_PLL0CFG_MSEL0_MUL409_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL410				(LPC_SC_PLL0CFG_MSEL0_MUL410_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL411				(LPC_SC_PLL0CFG_MSEL0_MUL411_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL412				(LPC_SC_PLL0CFG_MSEL0_MUL412_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL413				(LPC_SC_PLL0CFG_MSEL0_MUL413_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL414				(LPC_SC_PLL0CFG_MSEL0_MUL414_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL415				(LPC_SC_PLL0CFG_MSEL0_MUL415_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL416				(LPC_SC_PLL0CFG_MSEL0_MUL416_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL417				(LPC_SC_PLL0CFG_MSEL0_MUL417_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL418				(LPC_SC_PLL0CFG_MSEL0_MUL418_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL419				(LPC_SC_PLL0CFG_MSEL0_MUL419_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL420				(LPC_SC_PLL0CFG_MSEL0_MUL420_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL421				(LPC_SC_PLL0CFG_MSEL0_MUL421_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL422				(LPC_SC_PLL0CFG_MSEL0_MUL422_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL423				(LPC_SC_PLL0CFG_MSEL0_MUL423_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL424				(LPC_SC_PLL0CFG_MSEL0_MUL424_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL425				(LPC_SC_PLL0CFG_MSEL0_MUL425_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL426				(LPC_SC_PLL0CFG_MSEL0_MUL426_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL427				(LPC_SC_PLL0CFG_MSEL0_MUL427_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL428				(LPC_SC_PLL0CFG_MSEL0_MUL428_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL429				(LPC_SC_PLL0CFG_MSEL0_MUL429_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL430				(LPC_SC_PLL0CFG_MSEL0_MUL430_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL431				(LPC_SC_PLL0CFG_MSEL0_MUL431_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL432				(LPC_SC_PLL0CFG_MSEL0_MUL432_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL433				(LPC_SC_PLL0CFG_MSEL0_MUL433_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL434				(LPC_SC_PLL0CFG_MSEL0_MUL434_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL435				(LPC_SC_PLL0CFG_MSEL0_MUL435_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL436				(LPC_SC_PLL0CFG_MSEL0_MUL436_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL437				(LPC_SC_PLL0CFG_MSEL0_MUL437_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL438				(LPC_SC_PLL0CFG_MSEL0_MUL438_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL439				(LPC_SC_PLL0CFG_MSEL0_MUL439_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL440				(LPC_SC_PLL0CFG_MSEL0_MUL440_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL441				(LPC_SC_PLL0CFG_MSEL0_MUL441_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL442				(LPC_SC_PLL0CFG_MSEL0_MUL442_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL443				(LPC_SC_PLL0CFG_MSEL0_MUL443_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL444				(LPC_SC_PLL0CFG_MSEL0_MUL444_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL445				(LPC_SC_PLL0CFG_MSEL0_MUL445_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL446				(LPC_SC_PLL0CFG_MSEL0_MUL446_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL447				(LPC_SC_PLL0CFG_MSEL0_MUL447_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL448				(LPC_SC_PLL0CFG_MSEL0_MUL448_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL449				(LPC_SC_PLL0CFG_MSEL0_MUL449_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL450				(LPC_SC_PLL0CFG_MSEL0_MUL450_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL451				(LPC_SC_PLL0CFG_MSEL0_MUL451_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL452				(LPC_SC_PLL0CFG_MSEL0_MUL452_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL453				(LPC_SC_PLL0CFG_MSEL0_MUL453_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL454				(LPC_SC_PLL0CFG_MSEL0_MUL454_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL455				(LPC_SC_PLL0CFG_MSEL0_MUL455_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL456				(LPC_SC_PLL0CFG_MSEL0_MUL456_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL457				(LPC_SC_PLL0CFG_MSEL0_MUL457_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL458				(LPC_SC_PLL0CFG_MSEL0_MUL458_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL459				(LPC_SC_PLL0CFG_MSEL0_MUL459_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL460				(LPC_SC_PLL0CFG_MSEL0_MUL460_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL461				(LPC_SC_PLL0CFG_MSEL0_MUL461_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL462				(LPC_SC_PLL0CFG_MSEL0_MUL462_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL463				(LPC_SC_PLL0CFG_MSEL0_MUL463_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL464				(LPC_SC_PLL0CFG_MSEL0_MUL464_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL465				(LPC_SC_PLL0CFG_MSEL0_MUL465_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL466				(LPC_SC_PLL0CFG_MSEL0_MUL466_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL467				(LPC_SC_PLL0CFG_MSEL0_MUL467_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL468				(LPC_SC_PLL0CFG_MSEL0_MUL468_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL469				(LPC_SC_PLL0CFG_MSEL0_MUL469_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL470				(LPC_SC_PLL0CFG_MSEL0_MUL470_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL471				(LPC_SC_PLL0CFG_MSEL0_MUL471_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL472				(LPC_SC_PLL0CFG_MSEL0_MUL472_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL473				(LPC_SC_PLL0CFG_MSEL0_MUL473_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL474				(LPC_SC_PLL0CFG_MSEL0_MUL474_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL475				(LPC_SC_PLL0CFG_MSEL0_MUL475_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL476				(LPC_SC_PLL0CFG_MSEL0_MUL476_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL477				(LPC_SC_PLL0CFG_MSEL0_MUL477_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL478				(LPC_SC_PLL0CFG_MSEL0_MUL478_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL479				(LPC_SC_PLL0CFG_MSEL0_MUL479_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL480				(LPC_SC_PLL0CFG_MSEL0_MUL480_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL481				(LPC_SC_PLL0CFG_MSEL0_MUL481_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL482				(LPC_SC_PLL0CFG_MSEL0_MUL482_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL483				(LPC_SC_PLL0CFG_MSEL0_MUL483_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL484				(LPC_SC_PLL0CFG_MSEL0_MUL484_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL485				(LPC_SC_PLL0CFG_MSEL0_MUL485_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL486				(LPC_SC_PLL0CFG_MSEL0_MUL486_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL487				(LPC_SC_PLL0CFG_MSEL0_MUL487_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL488				(LPC_SC_PLL0CFG_MSEL0_MUL488_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL489				(LPC_SC_PLL0CFG_MSEL0_MUL489_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL490				(LPC_SC_PLL0CFG_MSEL0_MUL490_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL491				(LPC_SC_PLL0CFG_MSEL0_MUL491_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL492				(LPC_SC_PLL0CFG_MSEL0_MUL492_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL493				(LPC_SC_PLL0CFG_MSEL0_MUL493_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL494				(LPC_SC_PLL0CFG_MSEL0_MUL494_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL495				(LPC_SC_PLL0CFG_MSEL0_MUL495_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL496				(LPC_SC_PLL0CFG_MSEL0_MUL496_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL497				(LPC_SC_PLL0CFG_MSEL0_MUL497_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL498				(LPC_SC_PLL0CFG_MSEL0_MUL498_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL499				(LPC_SC_PLL0CFG_MSEL0_MUL499_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL500				(LPC_SC_PLL0CFG_MSEL0_MUL500_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL501				(LPC_SC_PLL0CFG_MSEL0_MUL501_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL502				(LPC_SC_PLL0CFG_MSEL0_MUL502_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL503				(LPC_SC_PLL0CFG_MSEL0_MUL503_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL504				(LPC_SC_PLL0CFG_MSEL0_MUL504_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL505				(LPC_SC_PLL0CFG_MSEL0_MUL505_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL506				(LPC_SC_PLL0CFG_MSEL0_MUL506_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL507				(LPC_SC_PLL0CFG_MSEL0_MUL507_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL508				(LPC_SC_PLL0CFG_MSEL0_MUL508_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL509				(LPC_SC_PLL0CFG_MSEL0_MUL509_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL510				(LPC_SC_PLL0CFG_MSEL0_MUL510_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL511				(LPC_SC_PLL0CFG_MSEL0_MUL511_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL512				(LPC_SC_PLL0CFG_MSEL0_MUL512_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL4272			(LPC_SC_PLL0CFG_MSEL0_MUL4272_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL4395			(LPC_SC_PLL0CFG_MSEL0_MUL4395_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL4578			(LPC_SC_PLL0CFG_MSEL0_MUL4578_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL4725			(LPC_SC_PLL0CFG_MSEL0_MUL4725_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL4807			(LPC_SC_PLL0CFG_MSEL0_MUL4807_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL5127			(LPC_SC_PLL0CFG_MSEL0_MUL5127_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL5188			(LPC_SC_PLL0CFG_MSEL0_MUL5188_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL5400			(LPC_SC_PLL0CFG_MSEL0_MUL5400_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL5493			(LPC_SC_PLL0CFG_MSEL0_MUL5493_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL5859			(LPC_SC_PLL0CFG_MSEL0_MUL5859_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6042			(LPC_SC_PLL0CFG_MSEL0_MUL6042_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6075			(LPC_SC_PLL0CFG_MSEL0_MUL6075_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6104			(LPC_SC_PLL0CFG_MSEL0_MUL6104_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6409			(LPC_SC_PLL0CFG_MSEL0_MUL6409_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6592			(LPC_SC_PLL0CFG_MSEL0_MUL6592_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6750			(LPC_SC_PLL0CFG_MSEL0_MUL6750_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6836			(LPC_SC_PLL0CFG_MSEL0_MUL6836_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6866			(LPC_SC_PLL0CFG_MSEL0_MUL6866_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL6958			(LPC_SC_PLL0CFG_MSEL0_MUL6958_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7050			(LPC_SC_PLL0CFG_MSEL0_MUL7050_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7324			(LPC_SC_PLL0CFG_MSEL0_MUL7324_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7425			(LPC_SC_PLL0CFG_MSEL0_MUL7425_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7690			(LPC_SC_PLL0CFG_MSEL0_MUL7690_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7813			(LPC_SC_PLL0CFG_MSEL0_MUL7813_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL7935			(LPC_SC_PLL0CFG_MSEL0_MUL7935_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL8057			(LPC_SC_PLL0CFG_MSEL0_MUL8057_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL8100			(LPC_SC_PLL0CFG_MSEL0_MUL8100_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL8545			(LPC_SC_PLL0CFG_MSEL0_MUL8545_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL8789			(LPC_SC_PLL0CFG_MSEL0_MUL8789_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL9155			(LPC_SC_PLL0CFG_MSEL0_MUL9155_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL9613			(LPC_SC_PLL0CFG_MSEL0_MUL9613_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL10254			(LPC_SC_PLL0CFG_MSEL0_MUL10254_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL10376			(LPC_SC_PLL0CFG_MSEL0_MUL10376_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL10986			(LPC_SC_PLL0CFG_MSEL0_MUL10986_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL11719			(LPC_SC_PLL0CFG_MSEL0_MUL11719_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL12085			(LPC_SC_PLL0CFG_MSEL0_MUL12085_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL12207			(LPC_SC_PLL0CFG_MSEL0_MUL12207_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL12817			(LPC_SC_PLL0CFG_MSEL0_MUL12817_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL13184			(LPC_SC_PLL0CFG_MSEL0_MUL13184_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL13672			(LPC_SC_PLL0CFG_MSEL0_MUL13672_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL13733			(LPC_SC_PLL0CFG_MSEL0_MUL13733_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL13916			(LPC_SC_PLL0CFG_MSEL0_MUL13916_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL14099			(LPC_SC_PLL0CFG_MSEL0_MUL14099_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL14420			(LPC_SC_PLL0CFG_MSEL0_MUL14420_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL14648			(LPC_SC_PLL0CFG_MSEL0_MUL14648_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL15381			(LPC_SC_PLL0CFG_MSEL0_MUL15381_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL15564			(LPC_SC_PLL0CFG_MSEL0_MUL15564_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL15625			(LPC_SC_PLL0CFG_MSEL0_MUL15625_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL15869			(LPC_SC_PLL0CFG_MSEL0_MUL15869_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL16113			(LPC_SC_PLL0CFG_MSEL0_MUL16113_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL16479			(LPC_SC_PLL0CFG_MSEL0_MUL16479_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL17578			(LPC_SC_PLL0CFG_MSEL0_MUL17578_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL18127			(LPC_SC_PLL0CFG_MSEL0_MUL18127_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL18311			(LPC_SC_PLL0CFG_MSEL0_MUL18311_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL19226			(LPC_SC_PLL0CFG_MSEL0_MUL19226_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL19775			(LPC_SC_PLL0CFG_MSEL0_MUL19775_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL20508			(LPC_SC_PLL0CFG_MSEL0_MUL20508_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL20599			(LPC_SC_PLL0CFG_MSEL0_MUL20599_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL20874			(LPC_SC_PLL0CFG_MSEL0_MUL20874_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL21149			(LPC_SC_PLL0CFG_MSEL0_MUL21149_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL21973			(LPC_SC_PLL0CFG_MSEL0_MUL21973_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL23071			(LPC_SC_PLL0CFG_MSEL0_MUL23071_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL23438			(LPC_SC_PLL0CFG_MSEL0_MUL23438_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL23804			(LPC_SC_PLL0CFG_MSEL0_MUL23804_value << LPC_SC_PLL0CFG_MSEL0_bit)
#define LPC_SC_PLL0CFG_MSEL0_MUL24170			(LPC_SC_PLL0CFG_MSEL0_MUL24170_value << LPC_SC_PLL0CFG_MSEL0_bit)

#define LPC_SC_PLL0CFG_NSEL0_DIV1				(LPC_SC_PLL0CFG_NSEL0_DIV1_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV2				(LPC_SC_PLL0CFG_NSEL0_DIV2_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV3				(LPC_SC_PLL0CFG_NSEL0_DIV3_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV4				(LPC_SC_PLL0CFG_NSEL0_DIV4_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV5				(LPC_SC_PLL0CFG_NSEL0_DIV5_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV6				(LPC_SC_PLL0CFG_NSEL0_DIV6_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV7				(LPC_SC_PLL0CFG_NSEL0_DIV7_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV8				(LPC_SC_PLL0CFG_NSEL0_DIV8_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV9				(LPC_SC_PLL0CFG_NSEL0_DIV9_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV10				(LPC_SC_PLL0CFG_NSEL0_DIV10_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV11				(LPC_SC_PLL0CFG_NSEL0_DIV11_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV12				(LPC_SC_PLL0CFG_NSEL0_DIV12_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV13				(LPC_SC_PLL0CFG_NSEL0_DIV13_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV14				(LPC_SC_PLL0CFG_NSEL0_DIV14_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV15				(LPC_SC_PLL0CFG_NSEL0_DIV15_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV16				(LPC_SC_PLL0CFG_NSEL0_DIV16_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV17				(LPC_SC_PLL0CFG_NSEL0_DIV17_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV18				(LPC_SC_PLL0CFG_NSEL0_DIV18_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV19				(LPC_SC_PLL0CFG_NSEL0_DIV19_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV20				(LPC_SC_PLL0CFG_NSEL0_DIV20_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV21				(LPC_SC_PLL0CFG_NSEL0_DIV21_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV22				(LPC_SC_PLL0CFG_NSEL0_DIV22_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV23				(LPC_SC_PLL0CFG_NSEL0_DIV23_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV24				(LPC_SC_PLL0CFG_NSEL0_DIV24_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV25				(LPC_SC_PLL0CFG_NSEL0_DIV25_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV26				(LPC_SC_PLL0CFG_NSEL0_DIV26_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV27				(LPC_SC_PLL0CFG_NSEL0_DIV27_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV28				(LPC_SC_PLL0CFG_NSEL0_DIV28_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV29				(LPC_SC_PLL0CFG_NSEL0_DIV29_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV30				(LPC_SC_PLL0CFG_NSEL0_DIV30_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV31				(LPC_SC_PLL0CFG_NSEL0_DIV31_value << LPC_SC_PLL0CFG_NSEL0_bit)
#define LPC_SC_PLL0CFG_NSEL0_DIV32				(LPC_SC_PLL0CFG_NSEL0_DIV32_value << LPC_SC_PLL0CFG_NSEL0_bit)

#define LPC_SC_PLL0CFG_MSEL0_0_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_0_bit)
#define LPC_SC_PLL0CFG_MSEL0_1_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_1_bit)
#define LPC_SC_PLL0CFG_MSEL0_2_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_2_bit)
#define LPC_SC_PLL0CFG_MSEL0_3_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_3_bit)
#define LPC_SC_PLL0CFG_MSEL0_4_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_4_bit)
#define LPC_SC_PLL0CFG_MSEL0_5_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_5_bit)
#define LPC_SC_PLL0CFG_MSEL0_6_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_6_bit)
#define LPC_SC_PLL0CFG_MSEL0_7_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_7_bit)
#define LPC_SC_PLL0CFG_MSEL0_8_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_8_bit)
#define LPC_SC_PLL0CFG_MSEL0_9_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_9_bit)
#define LPC_SC_PLL0CFG_MSEL0_10_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_10_bit)
#define LPC_SC_PLL0CFG_MSEL0_11_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_11_bit)
#define LPC_SC_PLL0CFG_MSEL0_12_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_12_bit)
#define LPC_SC_PLL0CFG_MSEL0_13_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_13_bit)
#define LPC_SC_PLL0CFG_MSEL0_14_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_MSEL0_14_bit)

#define LPC_SC_PLL0CFG_NSEL0_0_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_0_bit)
#define LPC_SC_PLL0CFG_NSEL0_1_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_1_bit)
#define LPC_SC_PLL0CFG_NSEL0_2_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_2_bit)
#define LPC_SC_PLL0CFG_NSEL0_3_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_3_bit)
#define LPC_SC_PLL0CFG_NSEL0_4_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_4_bit)
#define LPC_SC_PLL0CFG_NSEL0_5_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_5_bit)
#define LPC_SC_PLL0CFG_NSEL0_6_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_6_bit)
#define LPC_SC_PLL0CFG_NSEL0_7_bb				bitband_t BITBAND(&LPC_SC->PLL0CFG, LPC_SC_PLL0CFG_NSEL0_7_bit)

/*
+-----------------------------------------------------------------------------+
| PLL0STAT - PLL Status register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL0STAT_MSEL0_bit				0
#define LPC_SC_PLL0STAT_MSEL0_0_bit				0
#define LPC_SC_PLL0STAT_MSEL0_1_bit				1
#define LPC_SC_PLL0STAT_MSEL0_2_bit				2
#define LPC_SC_PLL0STAT_MSEL0_3_bit				3
#define LPC_SC_PLL0STAT_MSEL0_4_bit				4
#define LPC_SC_PLL0STAT_MSEL0_5_bit				5
#define LPC_SC_PLL0STAT_MSEL0_6_bit				6
#define LPC_SC_PLL0STAT_MSEL0_7_bit				7
#define LPC_SC_PLL0STAT_MSEL0_8_bit				8
#define LPC_SC_PLL0STAT_MSEL0_9_bit				9
#define LPC_SC_PLL0STAT_MSEL0_10_bit			10
#define LPC_SC_PLL0STAT_MSEL0_11_bit			11
#define LPC_SC_PLL0STAT_MSEL0_12_bit			12
#define LPC_SC_PLL0STAT_MSEL0_13_bit			13
#define LPC_SC_PLL0STAT_MSEL0_14_bit			14

#define LPC_SC_PLL0STAT_NSEL0_bit				16
#define LPC_SC_PLL0STAT_NSEL0_0_bit				16
#define LPC_SC_PLL0STAT_NSEL0_1_bit				17
#define LPC_SC_PLL0STAT_NSEL0_2_bit				18
#define LPC_SC_PLL0STAT_NSEL0_3_bit				19
#define LPC_SC_PLL0STAT_NSEL0_4_bit				20
#define LPC_SC_PLL0STAT_NSEL0_5_bit				21
#define LPC_SC_PLL0STAT_NSEL0_6_bit				22
#define LPC_SC_PLL0STAT_NSEL0_7_bit				23

#define LPC_SC_PLL0STAT_PLLE0_STAT_bit			24
#define LPC_SC_PLL0STAT_PLLC0_STAT_bit			25
#define LPC_SC_PLL0STAT_PLOCK0_bit				26

#define LPC_SC_PLL0STAT_MSEL0_0					(1 << LPC_SC_PLL0STAT_MSEL0_0_bit)
#define LPC_SC_PLL0STAT_MSEL0_1					(1 << LPC_SC_PLL0STAT_MSEL0_1_bit)
#define LPC_SC_PLL0STAT_MSEL0_2					(1 << LPC_SC_PLL0STAT_MSEL0_2_bit)
#define LPC_SC_PLL0STAT_MSEL0_3					(1 << LPC_SC_PLL0STAT_MSEL0_3_bit)
#define LPC_SC_PLL0STAT_MSEL0_4					(1 << LPC_SC_PLL0STAT_MSEL0_4_bit)
#define LPC_SC_PLL0STAT_MSEL0_5					(1 << LPC_SC_PLL0STAT_MSEL0_5_bit)
#define LPC_SC_PLL0STAT_MSEL0_6					(1 << LPC_SC_PLL0STAT_MSEL0_6_bit)
#define LPC_SC_PLL0STAT_MSEL0_7					(1 << LPC_SC_PLL0STAT_MSEL0_7_bit)
#define LPC_SC_PLL0STAT_MSEL0_8					(1 << LPC_SC_PLL0STAT_MSEL0_8_bit)
#define LPC_SC_PLL0STAT_MSEL0_9					(1 << LPC_SC_PLL0STAT_MSEL0_9_bit)
#define LPC_SC_PLL0STAT_MSEL0_10				(1 << LPC_SC_PLL0STAT_MSEL0_10_bit)
#define LPC_SC_PLL0STAT_MSEL0_11				(1 << LPC_SC_PLL0STAT_MSEL0_11_bit)
#define LPC_SC_PLL0STAT_MSEL0_12				(1 << LPC_SC_PLL0STAT_MSEL0_12_bit)
#define LPC_SC_PLL0STAT_MSEL0_13				(1 << LPC_SC_PLL0STAT_MSEL0_13_bit)
#define LPC_SC_PLL0STAT_MSEL0_14				(1 << LPC_SC_PLL0STAT_MSEL0_14_bit)

#define LPC_SC_PLL0STAT_NSEL0_0					(1 << LPC_SC_PLL0STAT_NSEL0_0_bit)
#define LPC_SC_PLL0STAT_NSEL0_1					(1 << LPC_SC_PLL0STAT_NSEL0_1_bit)
#define LPC_SC_PLL0STAT_NSEL0_2					(1 << LPC_SC_PLL0STAT_NSEL0_2_bit)
#define LPC_SC_PLL0STAT_NSEL0_3					(1 << LPC_SC_PLL0STAT_NSEL0_3_bit)
#define LPC_SC_PLL0STAT_NSEL0_4					(1 << LPC_SC_PLL0STAT_NSEL0_4_bit)
#define LPC_SC_PLL0STAT_NSEL0_5					(1 << LPC_SC_PLL0STAT_NSEL0_5_bit)
#define LPC_SC_PLL0STAT_NSEL0_6					(1 << LPC_SC_PLL0STAT_NSEL0_6_bit)
#define LPC_SC_PLL0STAT_NSEL0_7					(1 << LPC_SC_PLL0STAT_NSEL0_7_bit)

#define LPC_SC_PLL0STAT_PLLE0_STAT				(1 << LPC_SC_PLL0STAT_PLLE0_STAT_bit)
#define LPC_SC_PLL0STAT_PLLC0_STAT				(1 << LPC_SC_PLL0STAT_PLLC0_STAT_bit)
#define LPC_SC_PLL0STAT_PLOCK0					(1 << LPC_SC_PLL0STAT_PLOCK0_bit)

#define LPC_SC_PLL0STAT_MSEL0_MUL6_value		5
#define LPC_SC_PLL0STAT_MSEL0_MUL7_value		6
#define LPC_SC_PLL0STAT_MSEL0_MUL8_value		7
#define LPC_SC_PLL0STAT_MSEL0_MUL9_value		8
#define LPC_SC_PLL0STAT_MSEL0_MUL10_value		9
#define LPC_SC_PLL0STAT_MSEL0_MUL11_value		10
#define LPC_SC_PLL0STAT_MSEL0_MUL12_value		11
#define LPC_SC_PLL0STAT_MSEL0_MUL13_value		12
#define LPC_SC_PLL0STAT_MSEL0_MUL14_value		13
#define LPC_SC_PLL0STAT_MSEL0_MUL15_value		14
#define LPC_SC_PLL0STAT_MSEL0_MUL16_value		15
#define LPC_SC_PLL0STAT_MSEL0_MUL17_value		16
#define LPC_SC_PLL0STAT_MSEL0_MUL18_value		17
#define LPC_SC_PLL0STAT_MSEL0_MUL19_value		18
#define LPC_SC_PLL0STAT_MSEL0_MUL20_value		19
#define LPC_SC_PLL0STAT_MSEL0_MUL21_value		20
#define LPC_SC_PLL0STAT_MSEL0_MUL22_value		21
#define LPC_SC_PLL0STAT_MSEL0_MUL23_value		22
#define LPC_SC_PLL0STAT_MSEL0_MUL24_value		23
#define LPC_SC_PLL0STAT_MSEL0_MUL25_value		24
#define LPC_SC_PLL0STAT_MSEL0_MUL26_value		25
#define LPC_SC_PLL0STAT_MSEL0_MUL27_value		26
#define LPC_SC_PLL0STAT_MSEL0_MUL28_value		27
#define LPC_SC_PLL0STAT_MSEL0_MUL29_value		28
#define LPC_SC_PLL0STAT_MSEL0_MUL30_value		29
#define LPC_SC_PLL0STAT_MSEL0_MUL31_value		30
#define LPC_SC_PLL0STAT_MSEL0_MUL32_value		31
#define LPC_SC_PLL0STAT_MSEL0_MUL33_value		32
#define LPC_SC_PLL0STAT_MSEL0_MUL34_value		33
#define LPC_SC_PLL0STAT_MSEL0_MUL35_value		34
#define LPC_SC_PLL0STAT_MSEL0_MUL36_value		35
#define LPC_SC_PLL0STAT_MSEL0_MUL37_value		36
#define LPC_SC_PLL0STAT_MSEL0_MUL38_value		37
#define LPC_SC_PLL0STAT_MSEL0_MUL39_value		38
#define LPC_SC_PLL0STAT_MSEL0_MUL40_value		39
#define LPC_SC_PLL0STAT_MSEL0_MUL41_value		40
#define LPC_SC_PLL0STAT_MSEL0_MUL42_value		41
#define LPC_SC_PLL0STAT_MSEL0_MUL43_value		42
#define LPC_SC_PLL0STAT_MSEL0_MUL44_value		43
#define LPC_SC_PLL0STAT_MSEL0_MUL45_value		44
#define LPC_SC_PLL0STAT_MSEL0_MUL46_value		45
#define LPC_SC_PLL0STAT_MSEL0_MUL47_value		46
#define LPC_SC_PLL0STAT_MSEL0_MUL48_value		47
#define LPC_SC_PLL0STAT_MSEL0_MUL49_value		48
#define LPC_SC_PLL0STAT_MSEL0_MUL50_value		49
#define LPC_SC_PLL0STAT_MSEL0_MUL51_value		50
#define LPC_SC_PLL0STAT_MSEL0_MUL52_value		51
#define LPC_SC_PLL0STAT_MSEL0_MUL53_value		52
#define LPC_SC_PLL0STAT_MSEL0_MUL54_value		53
#define LPC_SC_PLL0STAT_MSEL0_MUL55_value		54
#define LPC_SC_PLL0STAT_MSEL0_MUL56_value		55
#define LPC_SC_PLL0STAT_MSEL0_MUL57_value		56
#define LPC_SC_PLL0STAT_MSEL0_MUL58_value		57
#define LPC_SC_PLL0STAT_MSEL0_MUL59_value		58
#define LPC_SC_PLL0STAT_MSEL0_MUL60_value		59
#define LPC_SC_PLL0STAT_MSEL0_MUL61_value		60
#define LPC_SC_PLL0STAT_MSEL0_MUL62_value		61
#define LPC_SC_PLL0STAT_MSEL0_MUL63_value		62
#define LPC_SC_PLL0STAT_MSEL0_MUL64_value		63
#define LPC_SC_PLL0STAT_MSEL0_MUL65_value		64
#define LPC_SC_PLL0STAT_MSEL0_MUL66_value		65
#define LPC_SC_PLL0STAT_MSEL0_MUL67_value		66
#define LPC_SC_PLL0STAT_MSEL0_MUL68_value		67
#define LPC_SC_PLL0STAT_MSEL0_MUL69_value		68
#define LPC_SC_PLL0STAT_MSEL0_MUL70_value		69
#define LPC_SC_PLL0STAT_MSEL0_MUL71_value		70
#define LPC_SC_PLL0STAT_MSEL0_MUL72_value		71
#define LPC_SC_PLL0STAT_MSEL0_MUL73_value		72
#define LPC_SC_PLL0STAT_MSEL0_MUL74_value		73
#define LPC_SC_PLL0STAT_MSEL0_MUL75_value		74
#define LPC_SC_PLL0STAT_MSEL0_MUL76_value		75
#define LPC_SC_PLL0STAT_MSEL0_MUL77_value		76
#define LPC_SC_PLL0STAT_MSEL0_MUL78_value		77
#define LPC_SC_PLL0STAT_MSEL0_MUL79_value		78
#define LPC_SC_PLL0STAT_MSEL0_MUL80_value		79
#define LPC_SC_PLL0STAT_MSEL0_MUL81_value		80
#define LPC_SC_PLL0STAT_MSEL0_MUL82_value		81
#define LPC_SC_PLL0STAT_MSEL0_MUL83_value		82
#define LPC_SC_PLL0STAT_MSEL0_MUL84_value		83
#define LPC_SC_PLL0STAT_MSEL0_MUL85_value		84
#define LPC_SC_PLL0STAT_MSEL0_MUL86_value		85
#define LPC_SC_PLL0STAT_MSEL0_MUL87_value		86
#define LPC_SC_PLL0STAT_MSEL0_MUL88_value		87
#define LPC_SC_PLL0STAT_MSEL0_MUL89_value		88
#define LPC_SC_PLL0STAT_MSEL0_MUL90_value		89
#define LPC_SC_PLL0STAT_MSEL0_MUL91_value		90
#define LPC_SC_PLL0STAT_MSEL0_MUL92_value		91
#define LPC_SC_PLL0STAT_MSEL0_MUL93_value		92
#define LPC_SC_PLL0STAT_MSEL0_MUL94_value		93
#define LPC_SC_PLL0STAT_MSEL0_MUL95_value		94
#define LPC_SC_PLL0STAT_MSEL0_MUL96_value		95
#define LPC_SC_PLL0STAT_MSEL0_MUL97_value		96
#define LPC_SC_PLL0STAT_MSEL0_MUL98_value		97
#define LPC_SC_PLL0STAT_MSEL0_MUL99_value		98
#define LPC_SC_PLL0STAT_MSEL0_MUL100_value		99
#define LPC_SC_PLL0STAT_MSEL0_MUL101_value		100
#define LPC_SC_PLL0STAT_MSEL0_MUL102_value		101
#define LPC_SC_PLL0STAT_MSEL0_MUL103_value		102
#define LPC_SC_PLL0STAT_MSEL0_MUL104_value		103
#define LPC_SC_PLL0STAT_MSEL0_MUL105_value		104
#define LPC_SC_PLL0STAT_MSEL0_MUL106_value		105
#define LPC_SC_PLL0STAT_MSEL0_MUL107_value		106
#define LPC_SC_PLL0STAT_MSEL0_MUL108_value		107
#define LPC_SC_PLL0STAT_MSEL0_MUL109_value		108
#define LPC_SC_PLL0STAT_MSEL0_MUL110_value		109
#define LPC_SC_PLL0STAT_MSEL0_MUL111_value		110
#define LPC_SC_PLL0STAT_MSEL0_MUL112_value		111
#define LPC_SC_PLL0STAT_MSEL0_MUL113_value		112
#define LPC_SC_PLL0STAT_MSEL0_MUL114_value		113
#define LPC_SC_PLL0STAT_MSEL0_MUL115_value		114
#define LPC_SC_PLL0STAT_MSEL0_MUL116_value		115
#define LPC_SC_PLL0STAT_MSEL0_MUL117_value		116
#define LPC_SC_PLL0STAT_MSEL0_MUL118_value		117
#define LPC_SC_PLL0STAT_MSEL0_MUL119_value		118
#define LPC_SC_PLL0STAT_MSEL0_MUL120_value		119
#define LPC_SC_PLL0STAT_MSEL0_MUL121_value		120
#define LPC_SC_PLL0STAT_MSEL0_MUL122_value		121
#define LPC_SC_PLL0STAT_MSEL0_MUL123_value		122
#define LPC_SC_PLL0STAT_MSEL0_MUL124_value		123
#define LPC_SC_PLL0STAT_MSEL0_MUL125_value		124
#define LPC_SC_PLL0STAT_MSEL0_MUL126_value		125
#define LPC_SC_PLL0STAT_MSEL0_MUL127_value		126
#define LPC_SC_PLL0STAT_MSEL0_MUL128_value		127
#define LPC_SC_PLL0STAT_MSEL0_MUL129_value		128
#define LPC_SC_PLL0STAT_MSEL0_MUL130_value		129
#define LPC_SC_PLL0STAT_MSEL0_MUL131_value		130
#define LPC_SC_PLL0STAT_MSEL0_MUL132_value		131
#define LPC_SC_PLL0STAT_MSEL0_MUL133_value		132
#define LPC_SC_PLL0STAT_MSEL0_MUL134_value		133
#define LPC_SC_PLL0STAT_MSEL0_MUL135_value		134
#define LPC_SC_PLL0STAT_MSEL0_MUL136_value		135
#define LPC_SC_PLL0STAT_MSEL0_MUL137_value		136
#define LPC_SC_PLL0STAT_MSEL0_MUL138_value		137
#define LPC_SC_PLL0STAT_MSEL0_MUL139_value		138
#define LPC_SC_PLL0STAT_MSEL0_MUL140_value		139
#define LPC_SC_PLL0STAT_MSEL0_MUL141_value		140
#define LPC_SC_PLL0STAT_MSEL0_MUL142_value		141
#define LPC_SC_PLL0STAT_MSEL0_MUL143_value		142
#define LPC_SC_PLL0STAT_MSEL0_MUL144_value		143
#define LPC_SC_PLL0STAT_MSEL0_MUL145_value		144
#define LPC_SC_PLL0STAT_MSEL0_MUL146_value		145
#define LPC_SC_PLL0STAT_MSEL0_MUL147_value		146
#define LPC_SC_PLL0STAT_MSEL0_MUL148_value		147
#define LPC_SC_PLL0STAT_MSEL0_MUL149_value		148
#define LPC_SC_PLL0STAT_MSEL0_MUL150_value		149
#define LPC_SC_PLL0STAT_MSEL0_MUL151_value		150
#define LPC_SC_PLL0STAT_MSEL0_MUL152_value		151
#define LPC_SC_PLL0STAT_MSEL0_MUL153_value		152
#define LPC_SC_PLL0STAT_MSEL0_MUL154_value		153
#define LPC_SC_PLL0STAT_MSEL0_MUL155_value		154
#define LPC_SC_PLL0STAT_MSEL0_MUL156_value		155
#define LPC_SC_PLL0STAT_MSEL0_MUL157_value		156
#define LPC_SC_PLL0STAT_MSEL0_MUL158_value		157
#define LPC_SC_PLL0STAT_MSEL0_MUL159_value		158
#define LPC_SC_PLL0STAT_MSEL0_MUL160_value		159
#define LPC_SC_PLL0STAT_MSEL0_MUL161_value		160
#define LPC_SC_PLL0STAT_MSEL0_MUL162_value		161
#define LPC_SC_PLL0STAT_MSEL0_MUL163_value		162
#define LPC_SC_PLL0STAT_MSEL0_MUL164_value		163
#define LPC_SC_PLL0STAT_MSEL0_MUL165_value		164
#define LPC_SC_PLL0STAT_MSEL0_MUL166_value		165
#define LPC_SC_PLL0STAT_MSEL0_MUL167_value		166
#define LPC_SC_PLL0STAT_MSEL0_MUL168_value		167
#define LPC_SC_PLL0STAT_MSEL0_MUL169_value		168
#define LPC_SC_PLL0STAT_MSEL0_MUL170_value		169
#define LPC_SC_PLL0STAT_MSEL0_MUL171_value		170
#define LPC_SC_PLL0STAT_MSEL0_MUL172_value		171
#define LPC_SC_PLL0STAT_MSEL0_MUL173_value		172
#define LPC_SC_PLL0STAT_MSEL0_MUL174_value		173
#define LPC_SC_PLL0STAT_MSEL0_MUL175_value		174
#define LPC_SC_PLL0STAT_MSEL0_MUL176_value		175
#define LPC_SC_PLL0STAT_MSEL0_MUL177_value		176
#define LPC_SC_PLL0STAT_MSEL0_MUL178_value		177
#define LPC_SC_PLL0STAT_MSEL0_MUL179_value		178
#define LPC_SC_PLL0STAT_MSEL0_MUL180_value		179
#define LPC_SC_PLL0STAT_MSEL0_MUL181_value		180
#define LPC_SC_PLL0STAT_MSEL0_MUL182_value		181
#define LPC_SC_PLL0STAT_MSEL0_MUL183_value		182
#define LPC_SC_PLL0STAT_MSEL0_MUL184_value		183
#define LPC_SC_PLL0STAT_MSEL0_MUL185_value		184
#define LPC_SC_PLL0STAT_MSEL0_MUL186_value		185
#define LPC_SC_PLL0STAT_MSEL0_MUL187_value		186
#define LPC_SC_PLL0STAT_MSEL0_MUL188_value		187
#define LPC_SC_PLL0STAT_MSEL0_MUL189_value		188
#define LPC_SC_PLL0STAT_MSEL0_MUL190_value		189
#define LPC_SC_PLL0STAT_MSEL0_MUL191_value		190
#define LPC_SC_PLL0STAT_MSEL0_MUL192_value		191
#define LPC_SC_PLL0STAT_MSEL0_MUL193_value		192
#define LPC_SC_PLL0STAT_MSEL0_MUL194_value		193
#define LPC_SC_PLL0STAT_MSEL0_MUL195_value		194
#define LPC_SC_PLL0STAT_MSEL0_MUL196_value		195
#define LPC_SC_PLL0STAT_MSEL0_MUL197_value		196
#define LPC_SC_PLL0STAT_MSEL0_MUL198_value		197
#define LPC_SC_PLL0STAT_MSEL0_MUL199_value		198
#define LPC_SC_PLL0STAT_MSEL0_MUL200_value		199
#define LPC_SC_PLL0STAT_MSEL0_MUL201_value		200
#define LPC_SC_PLL0STAT_MSEL0_MUL202_value		201
#define LPC_SC_PLL0STAT_MSEL0_MUL203_value		202
#define LPC_SC_PLL0STAT_MSEL0_MUL204_value		203
#define LPC_SC_PLL0STAT_MSEL0_MUL205_value		204
#define LPC_SC_PLL0STAT_MSEL0_MUL206_value		205
#define LPC_SC_PLL0STAT_MSEL0_MUL207_value		206
#define LPC_SC_PLL0STAT_MSEL0_MUL208_value		207
#define LPC_SC_PLL0STAT_MSEL0_MUL209_value		208
#define LPC_SC_PLL0STAT_MSEL0_MUL210_value		209
#define LPC_SC_PLL0STAT_MSEL0_MUL211_value		210
#define LPC_SC_PLL0STAT_MSEL0_MUL212_value		211
#define LPC_SC_PLL0STAT_MSEL0_MUL213_value		212
#define LPC_SC_PLL0STAT_MSEL0_MUL214_value		213
#define LPC_SC_PLL0STAT_MSEL0_MUL215_value		214
#define LPC_SC_PLL0STAT_MSEL0_MUL216_value		215
#define LPC_SC_PLL0STAT_MSEL0_MUL217_value		216
#define LPC_SC_PLL0STAT_MSEL0_MUL218_value		217
#define LPC_SC_PLL0STAT_MSEL0_MUL219_value		218
#define LPC_SC_PLL0STAT_MSEL0_MUL220_value		219
#define LPC_SC_PLL0STAT_MSEL0_MUL221_value		220
#define LPC_SC_PLL0STAT_MSEL0_MUL222_value		221
#define LPC_SC_PLL0STAT_MSEL0_MUL223_value		222
#define LPC_SC_PLL0STAT_MSEL0_MUL224_value		223
#define LPC_SC_PLL0STAT_MSEL0_MUL225_value		224
#define LPC_SC_PLL0STAT_MSEL0_MUL226_value		225
#define LPC_SC_PLL0STAT_MSEL0_MUL227_value		226
#define LPC_SC_PLL0STAT_MSEL0_MUL228_value		227
#define LPC_SC_PLL0STAT_MSEL0_MUL229_value		228
#define LPC_SC_PLL0STAT_MSEL0_MUL230_value		229
#define LPC_SC_PLL0STAT_MSEL0_MUL231_value		230
#define LPC_SC_PLL0STAT_MSEL0_MUL232_value		231
#define LPC_SC_PLL0STAT_MSEL0_MUL233_value		232
#define LPC_SC_PLL0STAT_MSEL0_MUL234_value		233
#define LPC_SC_PLL0STAT_MSEL0_MUL235_value		234
#define LPC_SC_PLL0STAT_MSEL0_MUL236_value		235
#define LPC_SC_PLL0STAT_MSEL0_MUL237_value		236
#define LPC_SC_PLL0STAT_MSEL0_MUL238_value		237
#define LPC_SC_PLL0STAT_MSEL0_MUL239_value		238
#define LPC_SC_PLL0STAT_MSEL0_MUL240_value		239
#define LPC_SC_PLL0STAT_MSEL0_MUL241_value		240
#define LPC_SC_PLL0STAT_MSEL0_MUL242_value		241
#define LPC_SC_PLL0STAT_MSEL0_MUL243_value		242
#define LPC_SC_PLL0STAT_MSEL0_MUL244_value		243
#define LPC_SC_PLL0STAT_MSEL0_MUL245_value		244
#define LPC_SC_PLL0STAT_MSEL0_MUL246_value		245
#define LPC_SC_PLL0STAT_MSEL0_MUL247_value		246
#define LPC_SC_PLL0STAT_MSEL0_MUL248_value		247
#define LPC_SC_PLL0STAT_MSEL0_MUL249_value		248
#define LPC_SC_PLL0STAT_MSEL0_MUL250_value		249
#define LPC_SC_PLL0STAT_MSEL0_MUL251_value		250
#define LPC_SC_PLL0STAT_MSEL0_MUL252_value		251
#define LPC_SC_PLL0STAT_MSEL0_MUL253_value		252
#define LPC_SC_PLL0STAT_MSEL0_MUL254_value		253
#define LPC_SC_PLL0STAT_MSEL0_MUL255_value		254
#define LPC_SC_PLL0STAT_MSEL0_MUL256_value		255
#define LPC_SC_PLL0STAT_MSEL0_MUL257_value		256
#define LPC_SC_PLL0STAT_MSEL0_MUL258_value		257
#define LPC_SC_PLL0STAT_MSEL0_MUL259_value		258
#define LPC_SC_PLL0STAT_MSEL0_MUL260_value		259
#define LPC_SC_PLL0STAT_MSEL0_MUL261_value		260
#define LPC_SC_PLL0STAT_MSEL0_MUL262_value		261
#define LPC_SC_PLL0STAT_MSEL0_MUL263_value		262
#define LPC_SC_PLL0STAT_MSEL0_MUL264_value		263
#define LPC_SC_PLL0STAT_MSEL0_MUL265_value		264
#define LPC_SC_PLL0STAT_MSEL0_MUL266_value		265
#define LPC_SC_PLL0STAT_MSEL0_MUL267_value		266
#define LPC_SC_PLL0STAT_MSEL0_MUL268_value		267
#define LPC_SC_PLL0STAT_MSEL0_MUL269_value		268
#define LPC_SC_PLL0STAT_MSEL0_MUL270_value		269
#define LPC_SC_PLL0STAT_MSEL0_MUL271_value		270
#define LPC_SC_PLL0STAT_MSEL0_MUL272_value		271
#define LPC_SC_PLL0STAT_MSEL0_MUL273_value		272
#define LPC_SC_PLL0STAT_MSEL0_MUL274_value		273
#define LPC_SC_PLL0STAT_MSEL0_MUL275_value		274
#define LPC_SC_PLL0STAT_MSEL0_MUL276_value		275
#define LPC_SC_PLL0STAT_MSEL0_MUL277_value		276
#define LPC_SC_PLL0STAT_MSEL0_MUL278_value		277
#define LPC_SC_PLL0STAT_MSEL0_MUL279_value		278
#define LPC_SC_PLL0STAT_MSEL0_MUL280_value		279
#define LPC_SC_PLL0STAT_MSEL0_MUL281_value		280
#define LPC_SC_PLL0STAT_MSEL0_MUL282_value		281
#define LPC_SC_PLL0STAT_MSEL0_MUL283_value		282
#define LPC_SC_PLL0STAT_MSEL0_MUL284_value		283
#define LPC_SC_PLL0STAT_MSEL0_MUL285_value		284
#define LPC_SC_PLL0STAT_MSEL0_MUL286_value		285
#define LPC_SC_PLL0STAT_MSEL0_MUL287_value		286
#define LPC_SC_PLL0STAT_MSEL0_MUL288_value		287
#define LPC_SC_PLL0STAT_MSEL0_MUL289_value		288
#define LPC_SC_PLL0STAT_MSEL0_MUL290_value		289
#define LPC_SC_PLL0STAT_MSEL0_MUL291_value		290
#define LPC_SC_PLL0STAT_MSEL0_MUL292_value		291
#define LPC_SC_PLL0STAT_MSEL0_MUL293_value		292
#define LPC_SC_PLL0STAT_MSEL0_MUL294_value		293
#define LPC_SC_PLL0STAT_MSEL0_MUL295_value		294
#define LPC_SC_PLL0STAT_MSEL0_MUL296_value		295
#define LPC_SC_PLL0STAT_MSEL0_MUL297_value		296
#define LPC_SC_PLL0STAT_MSEL0_MUL298_value		297
#define LPC_SC_PLL0STAT_MSEL0_MUL299_value		298
#define LPC_SC_PLL0STAT_MSEL0_MUL300_value		299
#define LPC_SC_PLL0STAT_MSEL0_MUL301_value		300
#define LPC_SC_PLL0STAT_MSEL0_MUL302_value		301
#define LPC_SC_PLL0STAT_MSEL0_MUL303_value		302
#define LPC_SC_PLL0STAT_MSEL0_MUL304_value		303
#define LPC_SC_PLL0STAT_MSEL0_MUL305_value		304
#define LPC_SC_PLL0STAT_MSEL0_MUL306_value		305
#define LPC_SC_PLL0STAT_MSEL0_MUL307_value		306
#define LPC_SC_PLL0STAT_MSEL0_MUL308_value		307
#define LPC_SC_PLL0STAT_MSEL0_MUL309_value		308
#define LPC_SC_PLL0STAT_MSEL0_MUL310_value		309
#define LPC_SC_PLL0STAT_MSEL0_MUL311_value		310
#define LPC_SC_PLL0STAT_MSEL0_MUL312_value		311
#define LPC_SC_PLL0STAT_MSEL0_MUL313_value		312
#define LPC_SC_PLL0STAT_MSEL0_MUL314_value		313
#define LPC_SC_PLL0STAT_MSEL0_MUL315_value		314
#define LPC_SC_PLL0STAT_MSEL0_MUL316_value		315
#define LPC_SC_PLL0STAT_MSEL0_MUL317_value		316
#define LPC_SC_PLL0STAT_MSEL0_MUL318_value		317
#define LPC_SC_PLL0STAT_MSEL0_MUL319_value		318
#define LPC_SC_PLL0STAT_MSEL0_MUL320_value		319
#define LPC_SC_PLL0STAT_MSEL0_MUL321_value		320
#define LPC_SC_PLL0STAT_MSEL0_MUL322_value		321
#define LPC_SC_PLL0STAT_MSEL0_MUL323_value		322
#define LPC_SC_PLL0STAT_MSEL0_MUL324_value		323
#define LPC_SC_PLL0STAT_MSEL0_MUL325_value		324
#define LPC_SC_PLL0STAT_MSEL0_MUL326_value		325
#define LPC_SC_PLL0STAT_MSEL0_MUL327_value		326
#define LPC_SC_PLL0STAT_MSEL0_MUL328_value		327
#define LPC_SC_PLL0STAT_MSEL0_MUL329_value		328
#define LPC_SC_PLL0STAT_MSEL0_MUL330_value		329
#define LPC_SC_PLL0STAT_MSEL0_MUL331_value		330
#define LPC_SC_PLL0STAT_MSEL0_MUL332_value		331
#define LPC_SC_PLL0STAT_MSEL0_MUL333_value		332
#define LPC_SC_PLL0STAT_MSEL0_MUL334_value		333
#define LPC_SC_PLL0STAT_MSEL0_MUL335_value		334
#define LPC_SC_PLL0STAT_MSEL0_MUL336_value		335
#define LPC_SC_PLL0STAT_MSEL0_MUL337_value		336
#define LPC_SC_PLL0STAT_MSEL0_MUL338_value		337
#define LPC_SC_PLL0STAT_MSEL0_MUL339_value		338
#define LPC_SC_PLL0STAT_MSEL0_MUL340_value		339
#define LPC_SC_PLL0STAT_MSEL0_MUL341_value		340
#define LPC_SC_PLL0STAT_MSEL0_MUL342_value		341
#define LPC_SC_PLL0STAT_MSEL0_MUL343_value		342
#define LPC_SC_PLL0STAT_MSEL0_MUL344_value		343
#define LPC_SC_PLL0STAT_MSEL0_MUL345_value		344
#define LPC_SC_PLL0STAT_MSEL0_MUL346_value		345
#define LPC_SC_PLL0STAT_MSEL0_MUL347_value		346
#define LPC_SC_PLL0STAT_MSEL0_MUL348_value		347
#define LPC_SC_PLL0STAT_MSEL0_MUL349_value		348
#define LPC_SC_PLL0STAT_MSEL0_MUL350_value		349
#define LPC_SC_PLL0STAT_MSEL0_MUL351_value		350
#define LPC_SC_PLL0STAT_MSEL0_MUL352_value		351
#define LPC_SC_PLL0STAT_MSEL0_MUL353_value		352
#define LPC_SC_PLL0STAT_MSEL0_MUL354_value		353
#define LPC_SC_PLL0STAT_MSEL0_MUL355_value		354
#define LPC_SC_PLL0STAT_MSEL0_MUL356_value		355
#define LPC_SC_PLL0STAT_MSEL0_MUL357_value		356
#define LPC_SC_PLL0STAT_MSEL0_MUL358_value		357
#define LPC_SC_PLL0STAT_MSEL0_MUL359_value		358
#define LPC_SC_PLL0STAT_MSEL0_MUL360_value		359
#define LPC_SC_PLL0STAT_MSEL0_MUL361_value		360
#define LPC_SC_PLL0STAT_MSEL0_MUL362_value		361
#define LPC_SC_PLL0STAT_MSEL0_MUL363_value		362
#define LPC_SC_PLL0STAT_MSEL0_MUL364_value		363
#define LPC_SC_PLL0STAT_MSEL0_MUL365_value		364
#define LPC_SC_PLL0STAT_MSEL0_MUL366_value		365
#define LPC_SC_PLL0STAT_MSEL0_MUL367_value		366
#define LPC_SC_PLL0STAT_MSEL0_MUL368_value		367
#define LPC_SC_PLL0STAT_MSEL0_MUL369_value		368
#define LPC_SC_PLL0STAT_MSEL0_MUL370_value		369
#define LPC_SC_PLL0STAT_MSEL0_MUL371_value		370
#define LPC_SC_PLL0STAT_MSEL0_MUL372_value		371
#define LPC_SC_PLL0STAT_MSEL0_MUL373_value		372
#define LPC_SC_PLL0STAT_MSEL0_MUL374_value		373
#define LPC_SC_PLL0STAT_MSEL0_MUL375_value		374
#define LPC_SC_PLL0STAT_MSEL0_MUL376_value		375
#define LPC_SC_PLL0STAT_MSEL0_MUL377_value		376
#define LPC_SC_PLL0STAT_MSEL0_MUL378_value		377
#define LPC_SC_PLL0STAT_MSEL0_MUL379_value		378
#define LPC_SC_PLL0STAT_MSEL0_MUL380_value		379
#define LPC_SC_PLL0STAT_MSEL0_MUL381_value		380
#define LPC_SC_PLL0STAT_MSEL0_MUL382_value		381
#define LPC_SC_PLL0STAT_MSEL0_MUL383_value		382
#define LPC_SC_PLL0STAT_MSEL0_MUL384_value		383
#define LPC_SC_PLL0STAT_MSEL0_MUL385_value		384
#define LPC_SC_PLL0STAT_MSEL0_MUL386_value		385
#define LPC_SC_PLL0STAT_MSEL0_MUL387_value		386
#define LPC_SC_PLL0STAT_MSEL0_MUL388_value		387
#define LPC_SC_PLL0STAT_MSEL0_MUL389_value		388
#define LPC_SC_PLL0STAT_MSEL0_MUL390_value		389
#define LPC_SC_PLL0STAT_MSEL0_MUL391_value		390
#define LPC_SC_PLL0STAT_MSEL0_MUL392_value		391
#define LPC_SC_PLL0STAT_MSEL0_MUL393_value		392
#define LPC_SC_PLL0STAT_MSEL0_MUL394_value		393
#define LPC_SC_PLL0STAT_MSEL0_MUL395_value		394
#define LPC_SC_PLL0STAT_MSEL0_MUL396_value		395
#define LPC_SC_PLL0STAT_MSEL0_MUL397_value		396
#define LPC_SC_PLL0STAT_MSEL0_MUL398_value		397
#define LPC_SC_PLL0STAT_MSEL0_MUL399_value		398
#define LPC_SC_PLL0STAT_MSEL0_MUL400_value		399
#define LPC_SC_PLL0STAT_MSEL0_MUL401_value		400
#define LPC_SC_PLL0STAT_MSEL0_MUL402_value		401
#define LPC_SC_PLL0STAT_MSEL0_MUL403_value		402
#define LPC_SC_PLL0STAT_MSEL0_MUL404_value		403
#define LPC_SC_PLL0STAT_MSEL0_MUL405_value		404
#define LPC_SC_PLL0STAT_MSEL0_MUL406_value		405
#define LPC_SC_PLL0STAT_MSEL0_MUL407_value		406
#define LPC_SC_PLL0STAT_MSEL0_MUL408_value		407
#define LPC_SC_PLL0STAT_MSEL0_MUL409_value		408
#define LPC_SC_PLL0STAT_MSEL0_MUL410_value		409
#define LPC_SC_PLL0STAT_MSEL0_MUL411_value		410
#define LPC_SC_PLL0STAT_MSEL0_MUL412_value		411
#define LPC_SC_PLL0STAT_MSEL0_MUL413_value		412
#define LPC_SC_PLL0STAT_MSEL0_MUL414_value		413
#define LPC_SC_PLL0STAT_MSEL0_MUL415_value		414
#define LPC_SC_PLL0STAT_MSEL0_MUL416_value		415
#define LPC_SC_PLL0STAT_MSEL0_MUL417_value		416
#define LPC_SC_PLL0STAT_MSEL0_MUL418_value		417
#define LPC_SC_PLL0STAT_MSEL0_MUL419_value		418
#define LPC_SC_PLL0STAT_MSEL0_MUL420_value		419
#define LPC_SC_PLL0STAT_MSEL0_MUL421_value		420
#define LPC_SC_PLL0STAT_MSEL0_MUL422_value		421
#define LPC_SC_PLL0STAT_MSEL0_MUL423_value		422
#define LPC_SC_PLL0STAT_MSEL0_MUL424_value		423
#define LPC_SC_PLL0STAT_MSEL0_MUL425_value		424
#define LPC_SC_PLL0STAT_MSEL0_MUL426_value		425
#define LPC_SC_PLL0STAT_MSEL0_MUL427_value		426
#define LPC_SC_PLL0STAT_MSEL0_MUL428_value		427
#define LPC_SC_PLL0STAT_MSEL0_MUL429_value		428
#define LPC_SC_PLL0STAT_MSEL0_MUL430_value		429
#define LPC_SC_PLL0STAT_MSEL0_MUL431_value		430
#define LPC_SC_PLL0STAT_MSEL0_MUL432_value		431
#define LPC_SC_PLL0STAT_MSEL0_MUL433_value		432
#define LPC_SC_PLL0STAT_MSEL0_MUL434_value		433
#define LPC_SC_PLL0STAT_MSEL0_MUL435_value		434
#define LPC_SC_PLL0STAT_MSEL0_MUL436_value		435
#define LPC_SC_PLL0STAT_MSEL0_MUL437_value		436
#define LPC_SC_PLL0STAT_MSEL0_MUL438_value		437
#define LPC_SC_PLL0STAT_MSEL0_MUL439_value		438
#define LPC_SC_PLL0STAT_MSEL0_MUL440_value		439
#define LPC_SC_PLL0STAT_MSEL0_MUL441_value		440
#define LPC_SC_PLL0STAT_MSEL0_MUL442_value		441
#define LPC_SC_PLL0STAT_MSEL0_MUL443_value		442
#define LPC_SC_PLL0STAT_MSEL0_MUL444_value		443
#define LPC_SC_PLL0STAT_MSEL0_MUL445_value		444
#define LPC_SC_PLL0STAT_MSEL0_MUL446_value		445
#define LPC_SC_PLL0STAT_MSEL0_MUL447_value		446
#define LPC_SC_PLL0STAT_MSEL0_MUL448_value		447
#define LPC_SC_PLL0STAT_MSEL0_MUL449_value		448
#define LPC_SC_PLL0STAT_MSEL0_MUL450_value		449
#define LPC_SC_PLL0STAT_MSEL0_MUL451_value		450
#define LPC_SC_PLL0STAT_MSEL0_MUL452_value		451
#define LPC_SC_PLL0STAT_MSEL0_MUL453_value		452
#define LPC_SC_PLL0STAT_MSEL0_MUL454_value		453
#define LPC_SC_PLL0STAT_MSEL0_MUL455_value		454
#define LPC_SC_PLL0STAT_MSEL0_MUL456_value		455
#define LPC_SC_PLL0STAT_MSEL0_MUL457_value		456
#define LPC_SC_PLL0STAT_MSEL0_MUL458_value		457
#define LPC_SC_PLL0STAT_MSEL0_MUL459_value		458
#define LPC_SC_PLL0STAT_MSEL0_MUL460_value		459
#define LPC_SC_PLL0STAT_MSEL0_MUL461_value		460
#define LPC_SC_PLL0STAT_MSEL0_MUL462_value		461
#define LPC_SC_PLL0STAT_MSEL0_MUL463_value		462
#define LPC_SC_PLL0STAT_MSEL0_MUL464_value		463
#define LPC_SC_PLL0STAT_MSEL0_MUL465_value		464
#define LPC_SC_PLL0STAT_MSEL0_MUL466_value		465
#define LPC_SC_PLL0STAT_MSEL0_MUL467_value		466
#define LPC_SC_PLL0STAT_MSEL0_MUL468_value		467
#define LPC_SC_PLL0STAT_MSEL0_MUL469_value		468
#define LPC_SC_PLL0STAT_MSEL0_MUL470_value		469
#define LPC_SC_PLL0STAT_MSEL0_MUL471_value		470
#define LPC_SC_PLL0STAT_MSEL0_MUL472_value		471
#define LPC_SC_PLL0STAT_MSEL0_MUL473_value		472
#define LPC_SC_PLL0STAT_MSEL0_MUL474_value		473
#define LPC_SC_PLL0STAT_MSEL0_MUL475_value		474
#define LPC_SC_PLL0STAT_MSEL0_MUL476_value		475
#define LPC_SC_PLL0STAT_MSEL0_MUL477_value		476
#define LPC_SC_PLL0STAT_MSEL0_MUL478_value		477
#define LPC_SC_PLL0STAT_MSEL0_MUL479_value		478
#define LPC_SC_PLL0STAT_MSEL0_MUL480_value		479
#define LPC_SC_PLL0STAT_MSEL0_MUL481_value		480
#define LPC_SC_PLL0STAT_MSEL0_MUL482_value		481
#define LPC_SC_PLL0STAT_MSEL0_MUL483_value		482
#define LPC_SC_PLL0STAT_MSEL0_MUL484_value		483
#define LPC_SC_PLL0STAT_MSEL0_MUL485_value		484
#define LPC_SC_PLL0STAT_MSEL0_MUL486_value		485
#define LPC_SC_PLL0STAT_MSEL0_MUL487_value		486
#define LPC_SC_PLL0STAT_MSEL0_MUL488_value		487
#define LPC_SC_PLL0STAT_MSEL0_MUL489_value		488
#define LPC_SC_PLL0STAT_MSEL0_MUL490_value		489
#define LPC_SC_PLL0STAT_MSEL0_MUL491_value		490
#define LPC_SC_PLL0STAT_MSEL0_MUL492_value		491
#define LPC_SC_PLL0STAT_MSEL0_MUL493_value		492
#define LPC_SC_PLL0STAT_MSEL0_MUL494_value		493
#define LPC_SC_PLL0STAT_MSEL0_MUL495_value		494
#define LPC_SC_PLL0STAT_MSEL0_MUL496_value		495
#define LPC_SC_PLL0STAT_MSEL0_MUL497_value		496
#define LPC_SC_PLL0STAT_MSEL0_MUL498_value		497
#define LPC_SC_PLL0STAT_MSEL0_MUL499_value		498
#define LPC_SC_PLL0STAT_MSEL0_MUL500_value		499
#define LPC_SC_PLL0STAT_MSEL0_MUL501_value		500
#define LPC_SC_PLL0STAT_MSEL0_MUL502_value		501
#define LPC_SC_PLL0STAT_MSEL0_MUL503_value		502
#define LPC_SC_PLL0STAT_MSEL0_MUL504_value		503
#define LPC_SC_PLL0STAT_MSEL0_MUL505_value		504
#define LPC_SC_PLL0STAT_MSEL0_MUL506_value		505
#define LPC_SC_PLL0STAT_MSEL0_MUL507_value		506
#define LPC_SC_PLL0STAT_MSEL0_MUL508_value		507
#define LPC_SC_PLL0STAT_MSEL0_MUL509_value		508
#define LPC_SC_PLL0STAT_MSEL0_MUL510_value		509
#define LPC_SC_PLL0STAT_MSEL0_MUL511_value		510
#define LPC_SC_PLL0STAT_MSEL0_MUL512_value		511
#define LPC_SC_PLL0STAT_MSEL0_MUL4272_value		4271
#define LPC_SC_PLL0STAT_MSEL0_MUL4395_value		4394
#define LPC_SC_PLL0STAT_MSEL0_MUL4578_value		4577
#define LPC_SC_PLL0STAT_MSEL0_MUL4725_value		4724
#define LPC_SC_PLL0STAT_MSEL0_MUL4807_value		4806
#define LPC_SC_PLL0STAT_MSEL0_MUL5127_value		5126
#define LPC_SC_PLL0STAT_MSEL0_MUL5188_value		5187
#define LPC_SC_PLL0STAT_MSEL0_MUL5400_value		5399
#define LPC_SC_PLL0STAT_MSEL0_MUL5493_value		5492
#define LPC_SC_PLL0STAT_MSEL0_MUL5859_value		5858
#define LPC_SC_PLL0STAT_MSEL0_MUL6042_value		6041
#define LPC_SC_PLL0STAT_MSEL0_MUL6075_value		6074
#define LPC_SC_PLL0STAT_MSEL0_MUL6104_value		6103
#define LPC_SC_PLL0STAT_MSEL0_MUL6409_value		6408
#define LPC_SC_PLL0STAT_MSEL0_MUL6592_value		6591
#define LPC_SC_PLL0STAT_MSEL0_MUL6750_value		6749
#define LPC_SC_PLL0STAT_MSEL0_MUL6836_value		6835
#define LPC_SC_PLL0STAT_MSEL0_MUL6866_value		6865
#define LPC_SC_PLL0STAT_MSEL0_MUL6958_value		6957
#define LPC_SC_PLL0STAT_MSEL0_MUL7050_value		7049
#define LPC_SC_PLL0STAT_MSEL0_MUL7324_value		7323
#define LPC_SC_PLL0STAT_MSEL0_MUL7425_value		7424
#define LPC_SC_PLL0STAT_MSEL0_MUL7690_value		7689
#define LPC_SC_PLL0STAT_MSEL0_MUL7813_value		7812
#define LPC_SC_PLL0STAT_MSEL0_MUL7935_value		7934
#define LPC_SC_PLL0STAT_MSEL0_MUL8057_value		8056
#define LPC_SC_PLL0STAT_MSEL0_MUL8100_value		8099
#define LPC_SC_PLL0STAT_MSEL0_MUL8545_value		8544
#define LPC_SC_PLL0STAT_MSEL0_MUL8789_value		8788
#define LPC_SC_PLL0STAT_MSEL0_MUL9155_value		9154
#define LPC_SC_PLL0STAT_MSEL0_MUL9613_value		9612
#define LPC_SC_PLL0STAT_MSEL0_MUL10254_value	10253
#define LPC_SC_PLL0STAT_MSEL0_MUL10376_value	10375
#define LPC_SC_PLL0STAT_MSEL0_MUL10986_value	10985
#define LPC_SC_PLL0STAT_MSEL0_MUL11719_value	11718
#define LPC_SC_PLL0STAT_MSEL0_MUL12085_value	12084
#define LPC_SC_PLL0STAT_MSEL0_MUL12207_value	12206
#define LPC_SC_PLL0STAT_MSEL0_MUL12817_value	12816
#define LPC_SC_PLL0STAT_MSEL0_MUL13184_value	13183
#define LPC_SC_PLL0STAT_MSEL0_MUL13672_value	13671
#define LPC_SC_PLL0STAT_MSEL0_MUL13733_value	13732
#define LPC_SC_PLL0STAT_MSEL0_MUL13916_value	13915
#define LPC_SC_PLL0STAT_MSEL0_MUL14099_value	14098
#define LPC_SC_PLL0STAT_MSEL0_MUL14420_value	14419
#define LPC_SC_PLL0STAT_MSEL0_MUL14648_value	14647
#define LPC_SC_PLL0STAT_MSEL0_MUL15381_value	15380
#define LPC_SC_PLL0STAT_MSEL0_MUL15564_value	15563
#define LPC_SC_PLL0STAT_MSEL0_MUL15625_value	15624
#define LPC_SC_PLL0STAT_MSEL0_MUL15869_value	15868
#define LPC_SC_PLL0STAT_MSEL0_MUL16113_value	16112
#define LPC_SC_PLL0STAT_MSEL0_MUL16479_value	16478
#define LPC_SC_PLL0STAT_MSEL0_MUL17578_value	17577
#define LPC_SC_PLL0STAT_MSEL0_MUL18127_value	18126
#define LPC_SC_PLL0STAT_MSEL0_MUL18311_value	18310
#define LPC_SC_PLL0STAT_MSEL0_MUL19226_value	19225
#define LPC_SC_PLL0STAT_MSEL0_MUL19775_value	19774
#define LPC_SC_PLL0STAT_MSEL0_MUL20508_value	20507
#define LPC_SC_PLL0STAT_MSEL0_MUL20599_value	20598
#define LPC_SC_PLL0STAT_MSEL0_MUL20874_value	20873
#define LPC_SC_PLL0STAT_MSEL0_MUL21149_value	21148
#define LPC_SC_PLL0STAT_MSEL0_MUL21973_value	21972
#define LPC_SC_PLL0STAT_MSEL0_MUL23071_value	23070
#define LPC_SC_PLL0STAT_MSEL0_MUL23438_value	23437
#define LPC_SC_PLL0STAT_MSEL0_MUL23804_value	23803
#define LPC_SC_PLL0STAT_MSEL0_MUL24170_value	24169
#define LPC_SC_PLL0STAT_MSEL0_mask				32767

#define LPC_SC_PLL0STAT_NSEL0_DIV1_value		0
#define LPC_SC_PLL0STAT_NSEL0_DIV2_value		1
#define LPC_SC_PLL0STAT_NSEL0_DIV3_value		2
#define LPC_SC_PLL0STAT_NSEL0_DIV4_value		3
#define LPC_SC_PLL0STAT_NSEL0_DIV5_value		4
#define LPC_SC_PLL0STAT_NSEL0_DIV6_value		5
#define LPC_SC_PLL0STAT_NSEL0_DIV7_value		6
#define LPC_SC_PLL0STAT_NSEL0_DIV8_value		7
#define LPC_SC_PLL0STAT_NSEL0_DIV9_value		8
#define LPC_SC_PLL0STAT_NSEL0_DIV10_value		9
#define LPC_SC_PLL0STAT_NSEL0_DIV11_value		10
#define LPC_SC_PLL0STAT_NSEL0_DIV12_value		11
#define LPC_SC_PLL0STAT_NSEL0_DIV13_value		12
#define LPC_SC_PLL0STAT_NSEL0_DIV14_value		13
#define LPC_SC_PLL0STAT_NSEL0_DIV15_value		14
#define LPC_SC_PLL0STAT_NSEL0_DIV16_value		15
#define LPC_SC_PLL0STAT_NSEL0_DIV17_value		16
#define LPC_SC_PLL0STAT_NSEL0_DIV18_value		17
#define LPC_SC_PLL0STAT_NSEL0_DIV19_value		18
#define LPC_SC_PLL0STAT_NSEL0_DIV20_value		19
#define LPC_SC_PLL0STAT_NSEL0_DIV21_value		20
#define LPC_SC_PLL0STAT_NSEL0_DIV22_value		21
#define LPC_SC_PLL0STAT_NSEL0_DIV23_value		22
#define LPC_SC_PLL0STAT_NSEL0_DIV24_value		23
#define LPC_SC_PLL0STAT_NSEL0_DIV25_value		24
#define LPC_SC_PLL0STAT_NSEL0_DIV26_value		25
#define LPC_SC_PLL0STAT_NSEL0_DIV27_value		26
#define LPC_SC_PLL0STAT_NSEL0_DIV28_value		27
#define LPC_SC_PLL0STAT_NSEL0_DIV29_value		28
#define LPC_SC_PLL0STAT_NSEL0_DIV30_value		29
#define LPC_SC_PLL0STAT_NSEL0_DIV31_value		30
#define LPC_SC_PLL0STAT_NSEL0_DIV32_value		31
#define LPC_SC_PLL0STAT_NSEL0_mask				255

#define LPC_SC_PLL0STAT_MSEL0_MUL6				(LPC_SC_PLL0STAT_MSEL0_MUL6_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7				(LPC_SC_PLL0STAT_MSEL0_MUL7_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL8				(LPC_SC_PLL0STAT_MSEL0_MUL8_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL9				(LPC_SC_PLL0STAT_MSEL0_MUL9_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL10				(LPC_SC_PLL0STAT_MSEL0_MUL10_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL11				(LPC_SC_PLL0STAT_MSEL0_MUL11_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL12				(LPC_SC_PLL0STAT_MSEL0_MUL12_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL13				(LPC_SC_PLL0STAT_MSEL0_MUL13_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL14				(LPC_SC_PLL0STAT_MSEL0_MUL14_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL15				(LPC_SC_PLL0STAT_MSEL0_MUL15_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL16				(LPC_SC_PLL0STAT_MSEL0_MUL16_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL17				(LPC_SC_PLL0STAT_MSEL0_MUL17_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL18				(LPC_SC_PLL0STAT_MSEL0_MUL18_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL19				(LPC_SC_PLL0STAT_MSEL0_MUL19_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL20				(LPC_SC_PLL0STAT_MSEL0_MUL20_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL21				(LPC_SC_PLL0STAT_MSEL0_MUL21_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL22				(LPC_SC_PLL0STAT_MSEL0_MUL22_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL23				(LPC_SC_PLL0STAT_MSEL0_MUL23_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL24				(LPC_SC_PLL0STAT_MSEL0_MUL24_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL25				(LPC_SC_PLL0STAT_MSEL0_MUL25_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL26				(LPC_SC_PLL0STAT_MSEL0_MUL26_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL27				(LPC_SC_PLL0STAT_MSEL0_MUL27_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL28				(LPC_SC_PLL0STAT_MSEL0_MUL28_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL29				(LPC_SC_PLL0STAT_MSEL0_MUL29_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL30				(LPC_SC_PLL0STAT_MSEL0_MUL30_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL31				(LPC_SC_PLL0STAT_MSEL0_MUL31_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL32				(LPC_SC_PLL0STAT_MSEL0_MUL32_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL33				(LPC_SC_PLL0STAT_MSEL0_MUL33_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL34				(LPC_SC_PLL0STAT_MSEL0_MUL34_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL35				(LPC_SC_PLL0STAT_MSEL0_MUL35_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL36				(LPC_SC_PLL0STAT_MSEL0_MUL36_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL37				(LPC_SC_PLL0STAT_MSEL0_MUL37_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL38				(LPC_SC_PLL0STAT_MSEL0_MUL38_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL39				(LPC_SC_PLL0STAT_MSEL0_MUL39_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL40				(LPC_SC_PLL0STAT_MSEL0_MUL40_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL41				(LPC_SC_PLL0STAT_MSEL0_MUL41_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL42				(LPC_SC_PLL0STAT_MSEL0_MUL42_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL43				(LPC_SC_PLL0STAT_MSEL0_MUL43_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL44				(LPC_SC_PLL0STAT_MSEL0_MUL44_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL45				(LPC_SC_PLL0STAT_MSEL0_MUL45_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL46				(LPC_SC_PLL0STAT_MSEL0_MUL46_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL47				(LPC_SC_PLL0STAT_MSEL0_MUL47_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL48				(LPC_SC_PLL0STAT_MSEL0_MUL48_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL49				(LPC_SC_PLL0STAT_MSEL0_MUL49_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL50				(LPC_SC_PLL0STAT_MSEL0_MUL50_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL51				(LPC_SC_PLL0STAT_MSEL0_MUL51_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL52				(LPC_SC_PLL0STAT_MSEL0_MUL52_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL53				(LPC_SC_PLL0STAT_MSEL0_MUL53_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL54				(LPC_SC_PLL0STAT_MSEL0_MUL54_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL55				(LPC_SC_PLL0STAT_MSEL0_MUL55_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL56				(LPC_SC_PLL0STAT_MSEL0_MUL56_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL57				(LPC_SC_PLL0STAT_MSEL0_MUL57_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL58				(LPC_SC_PLL0STAT_MSEL0_MUL58_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL59				(LPC_SC_PLL0STAT_MSEL0_MUL59_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL60				(LPC_SC_PLL0STAT_MSEL0_MUL60_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL61				(LPC_SC_PLL0STAT_MSEL0_MUL61_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL62				(LPC_SC_PLL0STAT_MSEL0_MUL62_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL63				(LPC_SC_PLL0STAT_MSEL0_MUL63_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL64				(LPC_SC_PLL0STAT_MSEL0_MUL64_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL65				(LPC_SC_PLL0STAT_MSEL0_MUL65_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL66				(LPC_SC_PLL0STAT_MSEL0_MUL66_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL67				(LPC_SC_PLL0STAT_MSEL0_MUL67_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL68				(LPC_SC_PLL0STAT_MSEL0_MUL68_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL69				(LPC_SC_PLL0STAT_MSEL0_MUL69_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL70				(LPC_SC_PLL0STAT_MSEL0_MUL70_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL71				(LPC_SC_PLL0STAT_MSEL0_MUL71_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL72				(LPC_SC_PLL0STAT_MSEL0_MUL72_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL73				(LPC_SC_PLL0STAT_MSEL0_MUL73_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL74				(LPC_SC_PLL0STAT_MSEL0_MUL74_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL75				(LPC_SC_PLL0STAT_MSEL0_MUL75_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL76				(LPC_SC_PLL0STAT_MSEL0_MUL76_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL77				(LPC_SC_PLL0STAT_MSEL0_MUL77_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL78				(LPC_SC_PLL0STAT_MSEL0_MUL78_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL79				(LPC_SC_PLL0STAT_MSEL0_MUL79_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL80				(LPC_SC_PLL0STAT_MSEL0_MUL80_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL81				(LPC_SC_PLL0STAT_MSEL0_MUL81_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL82				(LPC_SC_PLL0STAT_MSEL0_MUL82_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL83				(LPC_SC_PLL0STAT_MSEL0_MUL83_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL84				(LPC_SC_PLL0STAT_MSEL0_MUL84_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL85				(LPC_SC_PLL0STAT_MSEL0_MUL85_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL86				(LPC_SC_PLL0STAT_MSEL0_MUL86_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL87				(LPC_SC_PLL0STAT_MSEL0_MUL87_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL88				(LPC_SC_PLL0STAT_MSEL0_MUL88_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL89				(LPC_SC_PLL0STAT_MSEL0_MUL89_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL90				(LPC_SC_PLL0STAT_MSEL0_MUL90_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL91				(LPC_SC_PLL0STAT_MSEL0_MUL91_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL92				(LPC_SC_PLL0STAT_MSEL0_MUL92_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL93				(LPC_SC_PLL0STAT_MSEL0_MUL93_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL94				(LPC_SC_PLL0STAT_MSEL0_MUL94_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL95				(LPC_SC_PLL0STAT_MSEL0_MUL95_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL96				(LPC_SC_PLL0STAT_MSEL0_MUL96_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL97				(LPC_SC_PLL0STAT_MSEL0_MUL97_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL98				(LPC_SC_PLL0STAT_MSEL0_MUL98_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL99				(LPC_SC_PLL0STAT_MSEL0_MUL99_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL100			(LPC_SC_PLL0STAT_MSEL0_MUL100_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL101			(LPC_SC_PLL0STAT_MSEL0_MUL101_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL102			(LPC_SC_PLL0STAT_MSEL0_MUL102_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL103			(LPC_SC_PLL0STAT_MSEL0_MUL103_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL104			(LPC_SC_PLL0STAT_MSEL0_MUL104_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL105			(LPC_SC_PLL0STAT_MSEL0_MUL105_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL106			(LPC_SC_PLL0STAT_MSEL0_MUL106_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL107			(LPC_SC_PLL0STAT_MSEL0_MUL107_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL108			(LPC_SC_PLL0STAT_MSEL0_MUL108_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL109			(LPC_SC_PLL0STAT_MSEL0_MUL109_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL110			(LPC_SC_PLL0STAT_MSEL0_MUL110_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL111			(LPC_SC_PLL0STAT_MSEL0_MUL111_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL112			(LPC_SC_PLL0STAT_MSEL0_MUL112_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL113			(LPC_SC_PLL0STAT_MSEL0_MUL113_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL114			(LPC_SC_PLL0STAT_MSEL0_MUL114_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL115			(LPC_SC_PLL0STAT_MSEL0_MUL115_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL116			(LPC_SC_PLL0STAT_MSEL0_MUL116_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL117			(LPC_SC_PLL0STAT_MSEL0_MUL117_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL118			(LPC_SC_PLL0STAT_MSEL0_MUL118_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL119			(LPC_SC_PLL0STAT_MSEL0_MUL119_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL120			(LPC_SC_PLL0STAT_MSEL0_MUL120_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL121			(LPC_SC_PLL0STAT_MSEL0_MUL121_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL122			(LPC_SC_PLL0STAT_MSEL0_MUL122_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL123			(LPC_SC_PLL0STAT_MSEL0_MUL123_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL124			(LPC_SC_PLL0STAT_MSEL0_MUL124_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL125			(LPC_SC_PLL0STAT_MSEL0_MUL125_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL126			(LPC_SC_PLL0STAT_MSEL0_MUL126_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL127			(LPC_SC_PLL0STAT_MSEL0_MUL127_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL128			(LPC_SC_PLL0STAT_MSEL0_MUL128_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL129			(LPC_SC_PLL0STAT_MSEL0_MUL129_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL130			(LPC_SC_PLL0STAT_MSEL0_MUL130_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL131			(LPC_SC_PLL0STAT_MSEL0_MUL131_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL132			(LPC_SC_PLL0STAT_MSEL0_MUL132_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL133			(LPC_SC_PLL0STAT_MSEL0_MUL133_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL134			(LPC_SC_PLL0STAT_MSEL0_MUL134_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL135			(LPC_SC_PLL0STAT_MSEL0_MUL135_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL136			(LPC_SC_PLL0STAT_MSEL0_MUL136_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL137			(LPC_SC_PLL0STAT_MSEL0_MUL137_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL138			(LPC_SC_PLL0STAT_MSEL0_MUL138_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL139			(LPC_SC_PLL0STAT_MSEL0_MUL139_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL140			(LPC_SC_PLL0STAT_MSEL0_MUL140_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL141			(LPC_SC_PLL0STAT_MSEL0_MUL141_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL142			(LPC_SC_PLL0STAT_MSEL0_MUL142_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL143			(LPC_SC_PLL0STAT_MSEL0_MUL143_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL144			(LPC_SC_PLL0STAT_MSEL0_MUL144_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL145			(LPC_SC_PLL0STAT_MSEL0_MUL145_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL146			(LPC_SC_PLL0STAT_MSEL0_MUL146_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL147			(LPC_SC_PLL0STAT_MSEL0_MUL147_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL148			(LPC_SC_PLL0STAT_MSEL0_MUL148_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL149			(LPC_SC_PLL0STAT_MSEL0_MUL149_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL150			(LPC_SC_PLL0STAT_MSEL0_MUL150_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL151			(LPC_SC_PLL0STAT_MSEL0_MUL151_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL152			(LPC_SC_PLL0STAT_MSEL0_MUL152_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL153			(LPC_SC_PLL0STAT_MSEL0_MUL153_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL154			(LPC_SC_PLL0STAT_MSEL0_MUL154_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL155			(LPC_SC_PLL0STAT_MSEL0_MUL155_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL156			(LPC_SC_PLL0STAT_MSEL0_MUL156_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL157			(LPC_SC_PLL0STAT_MSEL0_MUL157_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL158			(LPC_SC_PLL0STAT_MSEL0_MUL158_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL159			(LPC_SC_PLL0STAT_MSEL0_MUL159_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL160			(LPC_SC_PLL0STAT_MSEL0_MUL160_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL161			(LPC_SC_PLL0STAT_MSEL0_MUL161_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL162			(LPC_SC_PLL0STAT_MSEL0_MUL162_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL163			(LPC_SC_PLL0STAT_MSEL0_MUL163_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL164			(LPC_SC_PLL0STAT_MSEL0_MUL164_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL165			(LPC_SC_PLL0STAT_MSEL0_MUL165_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL166			(LPC_SC_PLL0STAT_MSEL0_MUL166_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL167			(LPC_SC_PLL0STAT_MSEL0_MUL167_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL168			(LPC_SC_PLL0STAT_MSEL0_MUL168_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL169			(LPC_SC_PLL0STAT_MSEL0_MUL169_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL170			(LPC_SC_PLL0STAT_MSEL0_MUL170_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL171			(LPC_SC_PLL0STAT_MSEL0_MUL171_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL172			(LPC_SC_PLL0STAT_MSEL0_MUL172_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL173			(LPC_SC_PLL0STAT_MSEL0_MUL173_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL174			(LPC_SC_PLL0STAT_MSEL0_MUL174_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL175			(LPC_SC_PLL0STAT_MSEL0_MUL175_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL176			(LPC_SC_PLL0STAT_MSEL0_MUL176_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL177			(LPC_SC_PLL0STAT_MSEL0_MUL177_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL178			(LPC_SC_PLL0STAT_MSEL0_MUL178_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL179			(LPC_SC_PLL0STAT_MSEL0_MUL179_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL180			(LPC_SC_PLL0STAT_MSEL0_MUL180_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL181			(LPC_SC_PLL0STAT_MSEL0_MUL181_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL182			(LPC_SC_PLL0STAT_MSEL0_MUL182_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL183			(LPC_SC_PLL0STAT_MSEL0_MUL183_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL184			(LPC_SC_PLL0STAT_MSEL0_MUL184_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL185			(LPC_SC_PLL0STAT_MSEL0_MUL185_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL186			(LPC_SC_PLL0STAT_MSEL0_MUL186_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL187			(LPC_SC_PLL0STAT_MSEL0_MUL187_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL188			(LPC_SC_PLL0STAT_MSEL0_MUL188_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL189			(LPC_SC_PLL0STAT_MSEL0_MUL189_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL190			(LPC_SC_PLL0STAT_MSEL0_MUL190_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL191			(LPC_SC_PLL0STAT_MSEL0_MUL191_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL192			(LPC_SC_PLL0STAT_MSEL0_MUL192_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL193			(LPC_SC_PLL0STAT_MSEL0_MUL193_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL194			(LPC_SC_PLL0STAT_MSEL0_MUL194_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL195			(LPC_SC_PLL0STAT_MSEL0_MUL195_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL196			(LPC_SC_PLL0STAT_MSEL0_MUL196_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL197			(LPC_SC_PLL0STAT_MSEL0_MUL197_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL198			(LPC_SC_PLL0STAT_MSEL0_MUL198_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL199			(LPC_SC_PLL0STAT_MSEL0_MUL199_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL200			(LPC_SC_PLL0STAT_MSEL0_MUL200_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL201			(LPC_SC_PLL0STAT_MSEL0_MUL201_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL202			(LPC_SC_PLL0STAT_MSEL0_MUL202_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL203			(LPC_SC_PLL0STAT_MSEL0_MUL203_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL204			(LPC_SC_PLL0STAT_MSEL0_MUL204_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL205			(LPC_SC_PLL0STAT_MSEL0_MUL205_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL206			(LPC_SC_PLL0STAT_MSEL0_MUL206_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL207			(LPC_SC_PLL0STAT_MSEL0_MUL207_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL208			(LPC_SC_PLL0STAT_MSEL0_MUL208_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL209			(LPC_SC_PLL0STAT_MSEL0_MUL209_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL210			(LPC_SC_PLL0STAT_MSEL0_MUL210_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL211			(LPC_SC_PLL0STAT_MSEL0_MUL211_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL212			(LPC_SC_PLL0STAT_MSEL0_MUL212_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL213			(LPC_SC_PLL0STAT_MSEL0_MUL213_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL214			(LPC_SC_PLL0STAT_MSEL0_MUL214_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL215			(LPC_SC_PLL0STAT_MSEL0_MUL215_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL216			(LPC_SC_PLL0STAT_MSEL0_MUL216_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL217			(LPC_SC_PLL0STAT_MSEL0_MUL217_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL218			(LPC_SC_PLL0STAT_MSEL0_MUL218_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL219			(LPC_SC_PLL0STAT_MSEL0_MUL219_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL220			(LPC_SC_PLL0STAT_MSEL0_MUL220_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL221			(LPC_SC_PLL0STAT_MSEL0_MUL221_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL222			(LPC_SC_PLL0STAT_MSEL0_MUL222_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL223			(LPC_SC_PLL0STAT_MSEL0_MUL223_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL224			(LPC_SC_PLL0STAT_MSEL0_MUL224_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL225			(LPC_SC_PLL0STAT_MSEL0_MUL225_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL226			(LPC_SC_PLL0STAT_MSEL0_MUL226_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL227			(LPC_SC_PLL0STAT_MSEL0_MUL227_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL228			(LPC_SC_PLL0STAT_MSEL0_MUL228_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL229			(LPC_SC_PLL0STAT_MSEL0_MUL229_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL230			(LPC_SC_PLL0STAT_MSEL0_MUL230_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL231			(LPC_SC_PLL0STAT_MSEL0_MUL231_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL232			(LPC_SC_PLL0STAT_MSEL0_MUL232_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL233			(LPC_SC_PLL0STAT_MSEL0_MUL233_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL234			(LPC_SC_PLL0STAT_MSEL0_MUL234_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL235			(LPC_SC_PLL0STAT_MSEL0_MUL235_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL236			(LPC_SC_PLL0STAT_MSEL0_MUL236_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL237			(LPC_SC_PLL0STAT_MSEL0_MUL237_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL238			(LPC_SC_PLL0STAT_MSEL0_MUL238_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL239			(LPC_SC_PLL0STAT_MSEL0_MUL239_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL240			(LPC_SC_PLL0STAT_MSEL0_MUL240_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL241			(LPC_SC_PLL0STAT_MSEL0_MUL241_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL242			(LPC_SC_PLL0STAT_MSEL0_MUL242_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL243			(LPC_SC_PLL0STAT_MSEL0_MUL243_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL244			(LPC_SC_PLL0STAT_MSEL0_MUL244_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL245			(LPC_SC_PLL0STAT_MSEL0_MUL245_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL246			(LPC_SC_PLL0STAT_MSEL0_MUL246_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL247			(LPC_SC_PLL0STAT_MSEL0_MUL247_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL248			(LPC_SC_PLL0STAT_MSEL0_MUL248_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL249			(LPC_SC_PLL0STAT_MSEL0_MUL249_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL250			(LPC_SC_PLL0STAT_MSEL0_MUL250_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL251			(LPC_SC_PLL0STAT_MSEL0_MUL251_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL252			(LPC_SC_PLL0STAT_MSEL0_MUL252_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL253			(LPC_SC_PLL0STAT_MSEL0_MUL253_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL254			(LPC_SC_PLL0STAT_MSEL0_MUL254_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL255			(LPC_SC_PLL0STAT_MSEL0_MUL255_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL256			(LPC_SC_PLL0STAT_MSEL0_MUL256_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL257			(LPC_SC_PLL0STAT_MSEL0_MUL257_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL258			(LPC_SC_PLL0STAT_MSEL0_MUL258_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL259			(LPC_SC_PLL0STAT_MSEL0_MUL259_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL260			(LPC_SC_PLL0STAT_MSEL0_MUL260_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL261			(LPC_SC_PLL0STAT_MSEL0_MUL261_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL262			(LPC_SC_PLL0STAT_MSEL0_MUL262_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL263			(LPC_SC_PLL0STAT_MSEL0_MUL263_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL264			(LPC_SC_PLL0STAT_MSEL0_MUL264_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL265			(LPC_SC_PLL0STAT_MSEL0_MUL265_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL266			(LPC_SC_PLL0STAT_MSEL0_MUL266_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL267			(LPC_SC_PLL0STAT_MSEL0_MUL267_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL268			(LPC_SC_PLL0STAT_MSEL0_MUL268_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL269			(LPC_SC_PLL0STAT_MSEL0_MUL269_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL270			(LPC_SC_PLL0STAT_MSEL0_MUL270_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL271			(LPC_SC_PLL0STAT_MSEL0_MUL271_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL272			(LPC_SC_PLL0STAT_MSEL0_MUL272_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL273			(LPC_SC_PLL0STAT_MSEL0_MUL273_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL274			(LPC_SC_PLL0STAT_MSEL0_MUL274_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL275			(LPC_SC_PLL0STAT_MSEL0_MUL275_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL276			(LPC_SC_PLL0STAT_MSEL0_MUL276_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL277			(LPC_SC_PLL0STAT_MSEL0_MUL277_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL278			(LPC_SC_PLL0STAT_MSEL0_MUL278_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL279			(LPC_SC_PLL0STAT_MSEL0_MUL279_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL280			(LPC_SC_PLL0STAT_MSEL0_MUL280_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL281			(LPC_SC_PLL0STAT_MSEL0_MUL281_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL282			(LPC_SC_PLL0STAT_MSEL0_MUL282_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL283			(LPC_SC_PLL0STAT_MSEL0_MUL283_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL284			(LPC_SC_PLL0STAT_MSEL0_MUL284_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL285			(LPC_SC_PLL0STAT_MSEL0_MUL285_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL286			(LPC_SC_PLL0STAT_MSEL0_MUL286_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL287			(LPC_SC_PLL0STAT_MSEL0_MUL287_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL288			(LPC_SC_PLL0STAT_MSEL0_MUL288_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL289			(LPC_SC_PLL0STAT_MSEL0_MUL289_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL290			(LPC_SC_PLL0STAT_MSEL0_MUL290_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL291			(LPC_SC_PLL0STAT_MSEL0_MUL291_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL292			(LPC_SC_PLL0STAT_MSEL0_MUL292_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL293			(LPC_SC_PLL0STAT_MSEL0_MUL293_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL294			(LPC_SC_PLL0STAT_MSEL0_MUL294_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL295			(LPC_SC_PLL0STAT_MSEL0_MUL295_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL296			(LPC_SC_PLL0STAT_MSEL0_MUL296_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL297			(LPC_SC_PLL0STAT_MSEL0_MUL297_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL298			(LPC_SC_PLL0STAT_MSEL0_MUL298_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL299			(LPC_SC_PLL0STAT_MSEL0_MUL299_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL300			(LPC_SC_PLL0STAT_MSEL0_MUL300_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL301			(LPC_SC_PLL0STAT_MSEL0_MUL301_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL302			(LPC_SC_PLL0STAT_MSEL0_MUL302_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL303			(LPC_SC_PLL0STAT_MSEL0_MUL303_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL304			(LPC_SC_PLL0STAT_MSEL0_MUL304_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL305			(LPC_SC_PLL0STAT_MSEL0_MUL305_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL306			(LPC_SC_PLL0STAT_MSEL0_MUL306_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL307			(LPC_SC_PLL0STAT_MSEL0_MUL307_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL308			(LPC_SC_PLL0STAT_MSEL0_MUL308_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL309			(LPC_SC_PLL0STAT_MSEL0_MUL309_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL310			(LPC_SC_PLL0STAT_MSEL0_MUL310_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL311			(LPC_SC_PLL0STAT_MSEL0_MUL311_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL312			(LPC_SC_PLL0STAT_MSEL0_MUL312_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL313			(LPC_SC_PLL0STAT_MSEL0_MUL313_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL314			(LPC_SC_PLL0STAT_MSEL0_MUL314_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL315			(LPC_SC_PLL0STAT_MSEL0_MUL315_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL316			(LPC_SC_PLL0STAT_MSEL0_MUL316_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL317			(LPC_SC_PLL0STAT_MSEL0_MUL317_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL318			(LPC_SC_PLL0STAT_MSEL0_MUL318_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL319			(LPC_SC_PLL0STAT_MSEL0_MUL319_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL320			(LPC_SC_PLL0STAT_MSEL0_MUL320_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL321			(LPC_SC_PLL0STAT_MSEL0_MUL321_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL322			(LPC_SC_PLL0STAT_MSEL0_MUL322_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL323			(LPC_SC_PLL0STAT_MSEL0_MUL323_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL324			(LPC_SC_PLL0STAT_MSEL0_MUL324_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL325			(LPC_SC_PLL0STAT_MSEL0_MUL325_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL326			(LPC_SC_PLL0STAT_MSEL0_MUL326_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL327			(LPC_SC_PLL0STAT_MSEL0_MUL327_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL328			(LPC_SC_PLL0STAT_MSEL0_MUL328_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL329			(LPC_SC_PLL0STAT_MSEL0_MUL329_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL330			(LPC_SC_PLL0STAT_MSEL0_MUL330_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL331			(LPC_SC_PLL0STAT_MSEL0_MUL331_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL332			(LPC_SC_PLL0STAT_MSEL0_MUL332_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL333			(LPC_SC_PLL0STAT_MSEL0_MUL333_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL334			(LPC_SC_PLL0STAT_MSEL0_MUL334_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL335			(LPC_SC_PLL0STAT_MSEL0_MUL335_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL336			(LPC_SC_PLL0STAT_MSEL0_MUL336_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL337			(LPC_SC_PLL0STAT_MSEL0_MUL337_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL338			(LPC_SC_PLL0STAT_MSEL0_MUL338_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL339			(LPC_SC_PLL0STAT_MSEL0_MUL339_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL340			(LPC_SC_PLL0STAT_MSEL0_MUL340_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL341			(LPC_SC_PLL0STAT_MSEL0_MUL341_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL342			(LPC_SC_PLL0STAT_MSEL0_MUL342_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL343			(LPC_SC_PLL0STAT_MSEL0_MUL343_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL344			(LPC_SC_PLL0STAT_MSEL0_MUL344_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL345			(LPC_SC_PLL0STAT_MSEL0_MUL345_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL346			(LPC_SC_PLL0STAT_MSEL0_MUL346_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL347			(LPC_SC_PLL0STAT_MSEL0_MUL347_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL348			(LPC_SC_PLL0STAT_MSEL0_MUL348_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL349			(LPC_SC_PLL0STAT_MSEL0_MUL349_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL350			(LPC_SC_PLL0STAT_MSEL0_MUL350_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL351			(LPC_SC_PLL0STAT_MSEL0_MUL351_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL352			(LPC_SC_PLL0STAT_MSEL0_MUL352_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL353			(LPC_SC_PLL0STAT_MSEL0_MUL353_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL354			(LPC_SC_PLL0STAT_MSEL0_MUL354_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL355			(LPC_SC_PLL0STAT_MSEL0_MUL355_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL356			(LPC_SC_PLL0STAT_MSEL0_MUL356_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL357			(LPC_SC_PLL0STAT_MSEL0_MUL357_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL358			(LPC_SC_PLL0STAT_MSEL0_MUL358_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL359			(LPC_SC_PLL0STAT_MSEL0_MUL359_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL360			(LPC_SC_PLL0STAT_MSEL0_MUL360_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL361			(LPC_SC_PLL0STAT_MSEL0_MUL361_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL362			(LPC_SC_PLL0STAT_MSEL0_MUL362_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL363			(LPC_SC_PLL0STAT_MSEL0_MUL363_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL364			(LPC_SC_PLL0STAT_MSEL0_MUL364_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL365			(LPC_SC_PLL0STAT_MSEL0_MUL365_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL366			(LPC_SC_PLL0STAT_MSEL0_MUL366_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL367			(LPC_SC_PLL0STAT_MSEL0_MUL367_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL368			(LPC_SC_PLL0STAT_MSEL0_MUL368_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL369			(LPC_SC_PLL0STAT_MSEL0_MUL369_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL370			(LPC_SC_PLL0STAT_MSEL0_MUL370_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL371			(LPC_SC_PLL0STAT_MSEL0_MUL371_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL372			(LPC_SC_PLL0STAT_MSEL0_MUL372_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL373			(LPC_SC_PLL0STAT_MSEL0_MUL373_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL374			(LPC_SC_PLL0STAT_MSEL0_MUL374_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL375			(LPC_SC_PLL0STAT_MSEL0_MUL375_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL376			(LPC_SC_PLL0STAT_MSEL0_MUL376_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL377			(LPC_SC_PLL0STAT_MSEL0_MUL377_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL378			(LPC_SC_PLL0STAT_MSEL0_MUL378_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL379			(LPC_SC_PLL0STAT_MSEL0_MUL379_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL380			(LPC_SC_PLL0STAT_MSEL0_MUL380_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL381			(LPC_SC_PLL0STAT_MSEL0_MUL381_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL382			(LPC_SC_PLL0STAT_MSEL0_MUL382_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL383			(LPC_SC_PLL0STAT_MSEL0_MUL383_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL384			(LPC_SC_PLL0STAT_MSEL0_MUL384_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL385			(LPC_SC_PLL0STAT_MSEL0_MUL385_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL386			(LPC_SC_PLL0STAT_MSEL0_MUL386_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL387			(LPC_SC_PLL0STAT_MSEL0_MUL387_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL388			(LPC_SC_PLL0STAT_MSEL0_MUL388_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL389			(LPC_SC_PLL0STAT_MSEL0_MUL389_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL390			(LPC_SC_PLL0STAT_MSEL0_MUL390_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL391			(LPC_SC_PLL0STAT_MSEL0_MUL391_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL392			(LPC_SC_PLL0STAT_MSEL0_MUL392_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL393			(LPC_SC_PLL0STAT_MSEL0_MUL393_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL394			(LPC_SC_PLL0STAT_MSEL0_MUL394_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL395			(LPC_SC_PLL0STAT_MSEL0_MUL395_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL396			(LPC_SC_PLL0STAT_MSEL0_MUL396_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL397			(LPC_SC_PLL0STAT_MSEL0_MUL397_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL398			(LPC_SC_PLL0STAT_MSEL0_MUL398_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL399			(LPC_SC_PLL0STAT_MSEL0_MUL399_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL400			(LPC_SC_PLL0STAT_MSEL0_MUL400_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL401			(LPC_SC_PLL0STAT_MSEL0_MUL401_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL402			(LPC_SC_PLL0STAT_MSEL0_MUL402_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL403			(LPC_SC_PLL0STAT_MSEL0_MUL403_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL404			(LPC_SC_PLL0STAT_MSEL0_MUL404_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL405			(LPC_SC_PLL0STAT_MSEL0_MUL405_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL406			(LPC_SC_PLL0STAT_MSEL0_MUL406_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL407			(LPC_SC_PLL0STAT_MSEL0_MUL407_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL408			(LPC_SC_PLL0STAT_MSEL0_MUL408_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL409			(LPC_SC_PLL0STAT_MSEL0_MUL409_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL410			(LPC_SC_PLL0STAT_MSEL0_MUL410_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL411			(LPC_SC_PLL0STAT_MSEL0_MUL411_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL412			(LPC_SC_PLL0STAT_MSEL0_MUL412_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL413			(LPC_SC_PLL0STAT_MSEL0_MUL413_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL414			(LPC_SC_PLL0STAT_MSEL0_MUL414_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL415			(LPC_SC_PLL0STAT_MSEL0_MUL415_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL416			(LPC_SC_PLL0STAT_MSEL0_MUL416_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL417			(LPC_SC_PLL0STAT_MSEL0_MUL417_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL418			(LPC_SC_PLL0STAT_MSEL0_MUL418_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL419			(LPC_SC_PLL0STAT_MSEL0_MUL419_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL420			(LPC_SC_PLL0STAT_MSEL0_MUL420_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL421			(LPC_SC_PLL0STAT_MSEL0_MUL421_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL422			(LPC_SC_PLL0STAT_MSEL0_MUL422_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL423			(LPC_SC_PLL0STAT_MSEL0_MUL423_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL424			(LPC_SC_PLL0STAT_MSEL0_MUL424_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL425			(LPC_SC_PLL0STAT_MSEL0_MUL425_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL426			(LPC_SC_PLL0STAT_MSEL0_MUL426_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL427			(LPC_SC_PLL0STAT_MSEL0_MUL427_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL428			(LPC_SC_PLL0STAT_MSEL0_MUL428_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL429			(LPC_SC_PLL0STAT_MSEL0_MUL429_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL430			(LPC_SC_PLL0STAT_MSEL0_MUL430_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL431			(LPC_SC_PLL0STAT_MSEL0_MUL431_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL432			(LPC_SC_PLL0STAT_MSEL0_MUL432_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL433			(LPC_SC_PLL0STAT_MSEL0_MUL433_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL434			(LPC_SC_PLL0STAT_MSEL0_MUL434_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL435			(LPC_SC_PLL0STAT_MSEL0_MUL435_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL436			(LPC_SC_PLL0STAT_MSEL0_MUL436_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL437			(LPC_SC_PLL0STAT_MSEL0_MUL437_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL438			(LPC_SC_PLL0STAT_MSEL0_MUL438_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL439			(LPC_SC_PLL0STAT_MSEL0_MUL439_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL440			(LPC_SC_PLL0STAT_MSEL0_MUL440_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL441			(LPC_SC_PLL0STAT_MSEL0_MUL441_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL442			(LPC_SC_PLL0STAT_MSEL0_MUL442_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL443			(LPC_SC_PLL0STAT_MSEL0_MUL443_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL444			(LPC_SC_PLL0STAT_MSEL0_MUL444_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL445			(LPC_SC_PLL0STAT_MSEL0_MUL445_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL446			(LPC_SC_PLL0STAT_MSEL0_MUL446_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL447			(LPC_SC_PLL0STAT_MSEL0_MUL447_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL448			(LPC_SC_PLL0STAT_MSEL0_MUL448_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL449			(LPC_SC_PLL0STAT_MSEL0_MUL449_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL450			(LPC_SC_PLL0STAT_MSEL0_MUL450_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL451			(LPC_SC_PLL0STAT_MSEL0_MUL451_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL452			(LPC_SC_PLL0STAT_MSEL0_MUL452_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL453			(LPC_SC_PLL0STAT_MSEL0_MUL453_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL454			(LPC_SC_PLL0STAT_MSEL0_MUL454_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL455			(LPC_SC_PLL0STAT_MSEL0_MUL455_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL456			(LPC_SC_PLL0STAT_MSEL0_MUL456_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL457			(LPC_SC_PLL0STAT_MSEL0_MUL457_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL458			(LPC_SC_PLL0STAT_MSEL0_MUL458_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL459			(LPC_SC_PLL0STAT_MSEL0_MUL459_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL460			(LPC_SC_PLL0STAT_MSEL0_MUL460_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL461			(LPC_SC_PLL0STAT_MSEL0_MUL461_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL462			(LPC_SC_PLL0STAT_MSEL0_MUL462_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL463			(LPC_SC_PLL0STAT_MSEL0_MUL463_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL464			(LPC_SC_PLL0STAT_MSEL0_MUL464_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL465			(LPC_SC_PLL0STAT_MSEL0_MUL465_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL466			(LPC_SC_PLL0STAT_MSEL0_MUL466_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL467			(LPC_SC_PLL0STAT_MSEL0_MUL467_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL468			(LPC_SC_PLL0STAT_MSEL0_MUL468_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL469			(LPC_SC_PLL0STAT_MSEL0_MUL469_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL470			(LPC_SC_PLL0STAT_MSEL0_MUL470_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL471			(LPC_SC_PLL0STAT_MSEL0_MUL471_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL472			(LPC_SC_PLL0STAT_MSEL0_MUL472_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL473			(LPC_SC_PLL0STAT_MSEL0_MUL473_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL474			(LPC_SC_PLL0STAT_MSEL0_MUL474_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL475			(LPC_SC_PLL0STAT_MSEL0_MUL475_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL476			(LPC_SC_PLL0STAT_MSEL0_MUL476_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL477			(LPC_SC_PLL0STAT_MSEL0_MUL477_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL478			(LPC_SC_PLL0STAT_MSEL0_MUL478_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL479			(LPC_SC_PLL0STAT_MSEL0_MUL479_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL480			(LPC_SC_PLL0STAT_MSEL0_MUL480_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL481			(LPC_SC_PLL0STAT_MSEL0_MUL481_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL482			(LPC_SC_PLL0STAT_MSEL0_MUL482_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL483			(LPC_SC_PLL0STAT_MSEL0_MUL483_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL484			(LPC_SC_PLL0STAT_MSEL0_MUL484_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL485			(LPC_SC_PLL0STAT_MSEL0_MUL485_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL486			(LPC_SC_PLL0STAT_MSEL0_MUL486_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL487			(LPC_SC_PLL0STAT_MSEL0_MUL487_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL488			(LPC_SC_PLL0STAT_MSEL0_MUL488_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL489			(LPC_SC_PLL0STAT_MSEL0_MUL489_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL490			(LPC_SC_PLL0STAT_MSEL0_MUL490_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL491			(LPC_SC_PLL0STAT_MSEL0_MUL491_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL492			(LPC_SC_PLL0STAT_MSEL0_MUL492_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL493			(LPC_SC_PLL0STAT_MSEL0_MUL493_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL494			(LPC_SC_PLL0STAT_MSEL0_MUL494_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL495			(LPC_SC_PLL0STAT_MSEL0_MUL495_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL496			(LPC_SC_PLL0STAT_MSEL0_MUL496_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL497			(LPC_SC_PLL0STAT_MSEL0_MUL497_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL498			(LPC_SC_PLL0STAT_MSEL0_MUL498_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL499			(LPC_SC_PLL0STAT_MSEL0_MUL499_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL500			(LPC_SC_PLL0STAT_MSEL0_MUL500_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL501			(LPC_SC_PLL0STAT_MSEL0_MUL501_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL502			(LPC_SC_PLL0STAT_MSEL0_MUL502_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL503			(LPC_SC_PLL0STAT_MSEL0_MUL503_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL504			(LPC_SC_PLL0STAT_MSEL0_MUL504_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL505			(LPC_SC_PLL0STAT_MSEL0_MUL505_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL506			(LPC_SC_PLL0STAT_MSEL0_MUL506_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL507			(LPC_SC_PLL0STAT_MSEL0_MUL507_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL508			(LPC_SC_PLL0STAT_MSEL0_MUL508_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL509			(LPC_SC_PLL0STAT_MSEL0_MUL509_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL510			(LPC_SC_PLL0STAT_MSEL0_MUL510_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL511			(LPC_SC_PLL0STAT_MSEL0_MUL511_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL512			(LPC_SC_PLL0STAT_MSEL0_MUL512_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL4272			(LPC_SC_PLL0STAT_MSEL0_MUL4272_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL4395			(LPC_SC_PLL0STAT_MSEL0_MUL4395_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL4578			(LPC_SC_PLL0STAT_MSEL0_MUL4578_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL4725			(LPC_SC_PLL0STAT_MSEL0_MUL4725_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL4807			(LPC_SC_PLL0STAT_MSEL0_MUL4807_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL5127			(LPC_SC_PLL0STAT_MSEL0_MUL5127_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL5188			(LPC_SC_PLL0STAT_MSEL0_MUL5188_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL5400			(LPC_SC_PLL0STAT_MSEL0_MUL5400_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL5493			(LPC_SC_PLL0STAT_MSEL0_MUL5493_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL5859			(LPC_SC_PLL0STAT_MSEL0_MUL5859_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6042			(LPC_SC_PLL0STAT_MSEL0_MUL6042_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6075			(LPC_SC_PLL0STAT_MSEL0_MUL6075_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6104			(LPC_SC_PLL0STAT_MSEL0_MUL6104_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6409			(LPC_SC_PLL0STAT_MSEL0_MUL6409_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6592			(LPC_SC_PLL0STAT_MSEL0_MUL6592_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6750			(LPC_SC_PLL0STAT_MSEL0_MUL6750_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6836			(LPC_SC_PLL0STAT_MSEL0_MUL6836_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6866			(LPC_SC_PLL0STAT_MSEL0_MUL6866_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL6958			(LPC_SC_PLL0STAT_MSEL0_MUL6958_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7050			(LPC_SC_PLL0STAT_MSEL0_MUL7050_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7324			(LPC_SC_PLL0STAT_MSEL0_MUL7324_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7425			(LPC_SC_PLL0STAT_MSEL0_MUL7425_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7690			(LPC_SC_PLL0STAT_MSEL0_MUL7690_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7813			(LPC_SC_PLL0STAT_MSEL0_MUL7813_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL7935			(LPC_SC_PLL0STAT_MSEL0_MUL7935_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL8057			(LPC_SC_PLL0STAT_MSEL0_MUL8057_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL8100			(LPC_SC_PLL0STAT_MSEL0_MUL8100_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL8545			(LPC_SC_PLL0STAT_MSEL0_MUL8545_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL8789			(LPC_SC_PLL0STAT_MSEL0_MUL8789_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL9155			(LPC_SC_PLL0STAT_MSEL0_MUL9155_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL9613			(LPC_SC_PLL0STAT_MSEL0_MUL9613_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL10254			(LPC_SC_PLL0STAT_MSEL0_MUL10254_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL10376			(LPC_SC_PLL0STAT_MSEL0_MUL10376_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL10986			(LPC_SC_PLL0STAT_MSEL0_MUL10986_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL11719			(LPC_SC_PLL0STAT_MSEL0_MUL11719_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL12085			(LPC_SC_PLL0STAT_MSEL0_MUL12085_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL12207			(LPC_SC_PLL0STAT_MSEL0_MUL12207_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL12817			(LPC_SC_PLL0STAT_MSEL0_MUL12817_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL13184			(LPC_SC_PLL0STAT_MSEL0_MUL13184_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL13672			(LPC_SC_PLL0STAT_MSEL0_MUL13672_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL13733			(LPC_SC_PLL0STAT_MSEL0_MUL13733_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL13916			(LPC_SC_PLL0STAT_MSEL0_MUL13916_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL14099			(LPC_SC_PLL0STAT_MSEL0_MUL14099_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL14420			(LPC_SC_PLL0STAT_MSEL0_MUL14420_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL14648			(LPC_SC_PLL0STAT_MSEL0_MUL14648_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL15381			(LPC_SC_PLL0STAT_MSEL0_MUL15381_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL15564			(LPC_SC_PLL0STAT_MSEL0_MUL15564_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL15625			(LPC_SC_PLL0STAT_MSEL0_MUL15625_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL15869			(LPC_SC_PLL0STAT_MSEL0_MUL15869_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL16113			(LPC_SC_PLL0STAT_MSEL0_MUL16113_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL16479			(LPC_SC_PLL0STAT_MSEL0_MUL16479_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL17578			(LPC_SC_PLL0STAT_MSEL0_MUL17578_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL18127			(LPC_SC_PLL0STAT_MSEL0_MUL18127_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL18311			(LPC_SC_PLL0STAT_MSEL0_MUL18311_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL19226			(LPC_SC_PLL0STAT_MSEL0_MUL19226_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL19775			(LPC_SC_PLL0STAT_MSEL0_MUL19775_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL20508			(LPC_SC_PLL0STAT_MSEL0_MUL20508_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL20599			(LPC_SC_PLL0STAT_MSEL0_MUL20599_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL20874			(LPC_SC_PLL0STAT_MSEL0_MUL20874_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL21149			(LPC_SC_PLL0STAT_MSEL0_MUL21149_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL21973			(LPC_SC_PLL0STAT_MSEL0_MUL21973_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL23071			(LPC_SC_PLL0STAT_MSEL0_MUL23071_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL23438			(LPC_SC_PLL0STAT_MSEL0_MUL23438_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL23804			(LPC_SC_PLL0STAT_MSEL0_MUL23804_value << LPC_SC_PLL0STAT_MSEL0_bit)
#define LPC_SC_PLL0STAT_MSEL0_MUL24170			(LPC_SC_PLL0STAT_MSEL0_MUL24170_value << LPC_SC_PLL0STAT_MSEL0_bit)

#define LPC_SC_PLL0STAT_NSEL0_DIV1				(LPC_SC_PLL0STAT_NSEL0_DIV1_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV2				(LPC_SC_PLL0STAT_NSEL0_DIV2_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV3				(LPC_SC_PLL0STAT_NSEL0_DIV3_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV4				(LPC_SC_PLL0STAT_NSEL0_DIV4_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV5				(LPC_SC_PLL0STAT_NSEL0_DIV5_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV6				(LPC_SC_PLL0STAT_NSEL0_DIV6_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV7				(LPC_SC_PLL0STAT_NSEL0_DIV7_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV8				(LPC_SC_PLL0STAT_NSEL0_DIV8_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV9				(LPC_SC_PLL0STAT_NSEL0_DIV9_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV10				(LPC_SC_PLL0STAT_NSEL0_DIV10_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV11				(LPC_SC_PLL0STAT_NSEL0_DIV11_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV12				(LPC_SC_PLL0STAT_NSEL0_DIV12_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV13				(LPC_SC_PLL0STAT_NSEL0_DIV13_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV14				(LPC_SC_PLL0STAT_NSEL0_DIV14_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV15				(LPC_SC_PLL0STAT_NSEL0_DIV15_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV16				(LPC_SC_PLL0STAT_NSEL0_DIV16_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV17				(LPC_SC_PLL0STAT_NSEL0_DIV17_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV18				(LPC_SC_PLL0STAT_NSEL0_DIV18_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV19				(LPC_SC_PLL0STAT_NSEL0_DIV19_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV20				(LPC_SC_PLL0STAT_NSEL0_DIV20_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV21				(LPC_SC_PLL0STAT_NSEL0_DIV21_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV22				(LPC_SC_PLL0STAT_NSEL0_DIV22_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV23				(LPC_SC_PLL0STAT_NSEL0_DIV23_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV24				(LPC_SC_PLL0STAT_NSEL0_DIV24_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV25				(LPC_SC_PLL0STAT_NSEL0_DIV25_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV26				(LPC_SC_PLL0STAT_NSEL0_DIV26_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV27				(LPC_SC_PLL0STAT_NSEL0_DIV27_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV28				(LPC_SC_PLL0STAT_NSEL0_DIV28_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV29				(LPC_SC_PLL0STAT_NSEL0_DIV29_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV30				(LPC_SC_PLL0STAT_NSEL0_DIV30_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV31				(LPC_SC_PLL0STAT_NSEL0_DIV31_value << LPC_SC_PLL0STAT_NSEL0_bit)
#define LPC_SC_PLL0STAT_NSEL0_DIV32				(LPC_SC_PLL0STAT_NSEL0_DIV32_value << LPC_SC_PLL0STAT_NSEL0_bit)

#define LPC_SC_PLL0STAT_MSEL0_0_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_0_bit)
#define LPC_SC_PLL0STAT_MSEL0_1_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_1_bit)
#define LPC_SC_PLL0STAT_MSEL0_2_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_2_bit)
#define LPC_SC_PLL0STAT_MSEL0_3_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_3_bit)
#define LPC_SC_PLL0STAT_MSEL0_4_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_4_bit)
#define LPC_SC_PLL0STAT_MSEL0_5_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_5_bit)
#define LPC_SC_PLL0STAT_MSEL0_6_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_6_bit)
#define LPC_SC_PLL0STAT_MSEL0_7_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_7_bit)
#define LPC_SC_PLL0STAT_MSEL0_8_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_8_bit)
#define LPC_SC_PLL0STAT_MSEL0_9_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_9_bit)
#define LPC_SC_PLL0STAT_MSEL0_10_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_10_bit)
#define LPC_SC_PLL0STAT_MSEL0_11_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_11_bit)
#define LPC_SC_PLL0STAT_MSEL0_12_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_12_bit)
#define LPC_SC_PLL0STAT_MSEL0_13_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_13_bit)
#define LPC_SC_PLL0STAT_MSEL0_14_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_MSEL0_14_bit)

#define LPC_SC_PLL0STAT_NSEL0_0_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_0_bit)
#define LPC_SC_PLL0STAT_NSEL0_1_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_1_bit)
#define LPC_SC_PLL0STAT_NSEL0_2_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_2_bit)
#define LPC_SC_PLL0STAT_NSEL0_3_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_3_bit)
#define LPC_SC_PLL0STAT_NSEL0_4_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_4_bit)
#define LPC_SC_PLL0STAT_NSEL0_5_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_5_bit)
#define LPC_SC_PLL0STAT_NSEL0_6_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_6_bit)
#define LPC_SC_PLL0STAT_NSEL0_7_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_NSEL0_7_bit)

#define LPC_SC_PLL0STAT_PLLE0_STAT_bb			bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_PLLE0_STAT_bit)
#define LPC_SC_PLL0STAT_PLLC0_STAT_bb			bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_PLLC0_STAT_bit)
#define LPC_SC_PLL0STAT_PLOCK0_bb				bitband_t BITBAND(&LPC_SC->PLL0STAT, LPC_SC_PLL0STAT_PLOCK0_bit)

/*
+-----------------------------------------------------------------------------+
| PLL0FEED - PLL Feed register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL0FEED_FIRST					0xAA
#define LPC_SC_PLL0FEED_SECOND					0x55

/*
+-----------------------------------------------------------------------------+
| PLL1CON - PLL1 Control register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL1CON_PLLE1_bit				0
#define LPC_SC_PLL1CON_PLLC1_bit				1

#define LPC_SC_PLL1CON_PLLE1					(1 << LPC_SC_PLL1CON_PLLE1_bit)
#define LPC_SC_PLL1CON_PLLC1					(1 << LPC_SC_PLL1CON_PLLC1_bit)

#define LPC_SC_PLL1CON_PLLE1_bb					bitband_t BITBAND(&LPC_SC->PLL1CON, LPC_SC_PLL1CON_PLLE1_bit)
#define LPC_SC_PLL1CON_PLLC1_bb					bitband_t BITBAND(&LPC_SC->PLL1CON, LPC_SC_PLL1CON_PLLC1_bit)

/*
+-----------------------------------------------------------------------------+
| PLL1CFG - PLL1 Configuration register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL1CFG_MSEL1_bit				0
#define LPC_SC_PLL1CFG_MSEL1_0_bit				0
#define LPC_SC_PLL1CFG_MSEL1_1_bit				1
#define LPC_SC_PLL1CFG_MSEL1_2_bit				2
#define LPC_SC_PLL1CFG_MSEL1_3_bit				3
#define LPC_SC_PLL1CFG_MSEL1_4_bit				4

#define LPC_SC_PLL1CFG_PSEL1_bit				5
#define LPC_SC_PLL1CFG_PSEL1_0_bit				5
#define LPC_SC_PLL1CFG_PSEL1_1_bit				6

#define LPC_SC_PLL1CFG_MSEL1_0					(1 << LPC_SC_PLL1CFG_MSEL1_0_bit)
#define LPC_SC_PLL1CFG_MSEL1_1					(1 << LPC_SC_PLL1CFG_MSEL1_1_bit)
#define LPC_SC_PLL1CFG_MSEL1_2					(1 << LPC_SC_PLL1CFG_MSEL1_2_bit)
#define LPC_SC_PLL1CFG_MSEL1_3					(1 << LPC_SC_PLL1CFG_MSEL1_3_bit)
#define LPC_SC_PLL1CFG_MSEL1_4					(1 << LPC_SC_PLL1CFG_MSEL1_4_bit)

#define LPC_SC_PLL1CFG_PSEL1_0					(1 << LPC_SC_PLL1CFG_PSEL1_0_bit)
#define LPC_SC_PLL1CFG_PSEL1_1					(1 << LPC_SC_PLL1CFG_PSEL1_1_bit)

#define LPC_SC_PLL1CFG_MSEL1_MUL2_value			1
#define LPC_SC_PLL1CFG_MSEL1_MUL3_value			2
#define LPC_SC_PLL1CFG_MSEL1_MUL4_value			3
#define LPC_SC_PLL1CFG_MSEL1_mask				31

#define LPC_SC_PLL1CFG_PSEL1_DIV2_value			1
#define LPC_SC_PLL1CFG_PSEL1_mask				3

#define LPC_SC_PLL1CFG_MSEL1_MUL2				(LPC_SC_PLL1CFG_MSEL1_MUL2_value << LPC_SC_PLL1CFG_MSEL1_bit)
#define LPC_SC_PLL1CFG_MSEL1_MUL3				(LPC_SC_PLL1CFG_MSEL1_MUL3_value << LPC_SC_PLL1CFG_MSEL1_bit)
#define LPC_SC_PLL1CFG_MSEL1_MUL4				(LPC_SC_PLL1CFG_MSEL1_MUL4_value << LPC_SC_PLL1CFG_MSEL1_bit)

#define LPC_SC_PLL1CFG_PSEL1_DIV2				(LPC_SC_PLL1CFG_PSEL1_DIV2_value << LPC_SC_PLL1CFG_PSEL1_bit)

#define LPC_SC_PLL1CFG_MSEL1_0_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_MSEL1_0_bit)
#define LPC_SC_PLL1CFG_MSEL1_1_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_MSEL1_1_bit)
#define LPC_SC_PLL1CFG_MSEL1_2_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_MSEL1_2_bit)
#define LPC_SC_PLL1CFG_MSEL1_3_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_MSEL1_3_bit)
#define LPC_SC_PLL1CFG_MSEL1_4_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_MSEL1_4_bit)

#define LPC_SC_PLL1CFG_PSEL1_0_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_PSEL1_0_bit)
#define LPC_SC_PLL1CFG_PSEL1_1_bb				bitband_t BITBAND(&LPC_SC->PLL1CFG, LPC_SC_PLL1CFG_PSEL1_1_bit)

/*
+-----------------------------------------------------------------------------+
| PLL1STAT - PLL1 Status register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL1STAT_MSEL1_bit				0
#define LPC_SC_PLL1STAT_MSEL1_0_bit				0
#define LPC_SC_PLL1STAT_MSEL1_1_bit				1
#define LPC_SC_PLL1STAT_MSEL1_2_bit				2
#define LPC_SC_PLL1STAT_MSEL1_3_bit				3
#define LPC_SC_PLL1STAT_MSEL1_4_bit				4

#define LPC_SC_PLL1STAT_PSEL1_bit				5
#define LPC_SC_PLL1STAT_PSEL1_0_bit				5
#define LPC_SC_PLL1STAT_PSEL1_1_bit				6

#define LPC_SC_PLL1STAT_PLLE1_STAT_bit			8
#define LPC_SC_PLL1STAT_PLLC1_STAT_bit			9
#define LPC_SC_PLL1STAT_PLOCK1_bit				10

#define LPC_SC_PLL1STAT_MSEL1_0					(1 << LPC_SC_PLL1STAT_MSEL1_0_bit)
#define LPC_SC_PLL1STAT_MSEL1_1					(1 << LPC_SC_PLL1STAT_MSEL1_1_bit)
#define LPC_SC_PLL1STAT_MSEL1_2					(1 << LPC_SC_PLL1STAT_MSEL1_2_bit)
#define LPC_SC_PLL1STAT_MSEL1_3					(1 << LPC_SC_PLL1STAT_MSEL1_3_bit)
#define LPC_SC_PLL1STAT_MSEL1_4					(1 << LPC_SC_PLL1STAT_MSEL1_4_bit)

#define LPC_SC_PLL1STAT_PSEL1_0					(1 << LPC_SC_PLL1STAT_PSEL1_0_bit)
#define LPC_SC_PLL1STAT_PSEL1_1					(1 << LPC_SC_PLL1STAT_PSEL1_1_bit)

#define LPC_SC_PLL1STAT_PLLE1_STAT				(1 << LPC_SC_PLL1STAT_PLLE1_STAT_bit)
#define LPC_SC_PLL1STAT_PLLC1_STAT				(1 << LPC_SC_PLL1STAT_PLLC1_STAT_bit)
#define LPC_SC_PLL1STAT_PLOCK1					(1 << LPC_SC_PLL1STAT_PLOCK1_bit)

#define LPC_SC_PLL1STAT_MSEL1_MUL2_value		1
#define LPC_SC_PLL1STAT_MSEL1_MUL3_value		2
#define LPC_SC_PLL1STAT_MSEL1_MUL4_value		3
#define LPC_SC_PLL1STAT_MSEL1_mask				31

#define LPC_SC_PLL1STAT_PSEL1_DIV2_value		1
#define LPC_SC_PLL1STAT_PSEL1_mask				3

#define LPC_SC_PLL1STAT_MSEL1_MUL2				(LPC_SC_PLL1STAT_MSEL1_MUL2_value << LPC_SC_PLL1STAT_MSEL1_bit)
#define LPC_SC_PLL1STAT_MSEL1_MUL3				(LPC_SC_PLL1STAT_MSEL1_MUL3_value << LPC_SC_PLL1STAT_MSEL1_bit)
#define LPC_SC_PLL1STAT_MSEL1_MUL4				(LPC_SC_PLL1STAT_MSEL1_MUL4_value << LPC_SC_PLL1STAT_MSEL1_bit)

#define LPC_SC_PLL1STAT_PSEL1_DIV2				(LPC_SC_PLL1STAT_PSEL1_DIV2_value << LPC_SC_PLL1STAT_PSEL1_bit)

#define LPC_SC_PLL1STAT_MSEL1_0_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_MSEL1_0_bit)
#define LPC_SC_PLL1STAT_MSEL1_1_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_MSEL1_1_bit)
#define LPC_SC_PLL1STAT_MSEL1_2_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_MSEL1_2_bit)
#define LPC_SC_PLL1STAT_MSEL1_3_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_MSEL1_3_bit)
#define LPC_SC_PLL1STAT_MSEL1_4_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_MSEL1_4_bit)

#define LPC_SC_PLL1STAT_PSEL1_0_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_PSEL1_0_bit)
#define LPC_SC_PLL1STAT_PSEL1_1_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_PSEL1_1_bit)

#define LPC_SC_PLL1STAT_PLLE1_STAT_bb			bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_PLLE1_STAT_bit)
#define LPC_SC_PLL1STAT_PLLC1_STAT_bb			bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_PLLC1_STAT_bit)
#define LPC_SC_PLL1STAT_PLOCK1_bb				bitband_t BITBAND(&LPC_SC->PLL1STAT, LPC_SC_PLL1STAT_PLOCK1_bit)

/*
+-----------------------------------------------------------------------------+
| PLL1FEED - PLL1 Feed register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PLL1FEED_FIRST					0xAA
#define LPC_SC_PLL1FEED_SECOND					0x55

/*
+-----------------------------------------------------------------------------+
| PCON - Power Mode Control register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PCON_PM0_bit						0
#define LPC_SC_PCON_PM1_bit						1
#define LPC_SC_PCON_BODRPM_bit					2
#define LPC_SC_PCON_BOGD_bit					3
#define LPC_SC_PCON_BORD_bit					4
#define LPC_SC_PCON_SMFLAG_bit					8
#define LPC_SC_PCON_DSFLAG_bit					9
#define LPC_SC_PCON_PDFLAG_bit					10
#define LPC_SC_PCON_DPDFLAG_bit					11

#define LPC_SC_PCON_PM0							(1 << LPC_SC_PCON_PM0_bit)
#define LPC_SC_PCON_PM1							(1 << LPC_SC_PCON_PM1_bit)
#define LPC_SC_PCON_BODRPM						(1 << LPC_SC_PCON_BODRPM_bit)
#define LPC_SC_PCON_BOGD						(1 << LPC_SC_PCON_BOGD_bit)
#define LPC_SC_PCON_BORD						(1 << LPC_SC_PCON_BORD_bit)
#define LPC_SC_PCON_SMFLAG						(1 << LPC_SC_PCON_SMFLAG_bit)
#define LPC_SC_PCON_DSFLAG						(1 << LPC_SC_PCON_DSFLAG_bit)
#define LPC_SC_PCON_PDFLAG						(1 << LPC_SC_PCON_PDFLAG_bit)
#define LPC_SC_PCON_DPDFLAG						(1 << LPC_SC_PCON_DPDFLAG_bit)

#define LPC_SC_PCON_PM_SLEEP_value				0
#define LPC_SC_PCON_PM_POWER_DOWN_value			1
#define LPC_SC_PCON_PM_DEEP_POWER_DOWN_value	3
#define LPC_SC_PCON_PM_mask						3

#define LPC_SC_PCON_PM_SLEEP					(LPC_SC_PCON_PM_SLEEP_value << LPC_SC_PCON_PM0_bit)
#define LPC_SC_PCON_PM_POWER_DOWN				(LPC_SC_PCON_PM_POWER_DOWN_value << LPC_SC_PCON_PM0_bit)
#define LPC_SC_PCON_PM_DEEP_POWER_DOWN			(LPC_SC_PCON_PM_DEEP_POWER_DOWN_value << LPC_SC_PCON_PM0_bit)

#define LPC_SC_PCON_PM0_bb						bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_PM0_bit)
#define LPC_SC_PCON_PM1_bb						bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_PM1_bit)
#define LPC_SC_PCON_BODRPM_bb					bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_BODRPM_bit)
#define LPC_SC_PCON_BOGD_bb						bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_BOGD_bit)
#define LPC_SC_PCON_BORD_bb						bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_BORD_bit)
#define LPC_SC_PCON_SMFLAG_bb					bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_SMFLAG_bit)
#define LPC_SC_PCON_DSFLAG_bb					bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_DSFLAG_bit)
#define LPC_SC_PCON_PDFLAG_bb					bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_PDFLAG_bit)
#define LPC_SC_PCON_DPDFLAG_bb					bitband_t BITBAND(&LPC_SC->PCON, LPC_SC_PCON_DPDFLAG_bit)

/*
+-----------------------------------------------------------------------------+
| PCONP - Power Control for Peripherals register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PCONP_PCTIM0_bit					1
#define LPC_SC_PCONP_PCTIM1_bit					2
#define LPC_SC_PCONP_PCUART0_bit				3
#define LPC_SC_PCONP_PCUART1_bit				4
#define LPC_SC_PCONP_PCPWM1_bit					6
#define LPC_SC_PCONP_PCI2C0_bit					7
#define LPC_SC_PCONP_PCSPI_bit					8
#define LPC_SC_PCONP_PCRTC_bit					9
#define LPC_SC_PCONP_PCSSP1_bit					10
#define LPC_SC_PCONP_PCADC_bit					12
#define LPC_SC_PCONP_PCCAN1_bit					13
#define LPC_SC_PCONP_PCCAN2_bit					14
#define LPC_SC_PCONP_PCGPIO_bit					15
#define LPC_SC_PCONP_PCRIT_bit					16
#define LPC_SC_PCONP_PCMCPWM_bit				17
#define LPC_SC_PCONP_PCQEI_bit					18
#define LPC_SC_PCONP_PCI2C1_bit					19
#define LPC_SC_PCONP_PCSSP0_bit					21
#define LPC_SC_PCONP_PCTIM2_bit					22
#define LPC_SC_PCONP_PCTIM3_bit					23
#define LPC_SC_PCONP_PCUART2_bit				24
#define LPC_SC_PCONP_PCUART3_bit				25
#define LPC_SC_PCONP_PCI2C2_bit					26
#define LPC_SC_PCONP_PCI2S_bit					27
#define LPC_SC_PCONP_PCGPDMA_bit				29
#define LPC_SC_PCONP_PCENET_bit					30
#define LPC_SC_PCONP_PCUSB_bit					31

#define LPC_SC_PCONP_PCTIM0						(1 << LPC_SC_PCONP_PCTIM0_bit)
#define LPC_SC_PCONP_PCTIM1						(1 << LPC_SC_PCONP_PCTIM1_bit)
#define LPC_SC_PCONP_PCUART0					(1 << LPC_SC_PCONP_PCUART0_bit)
#define LPC_SC_PCONP_PCUART1					(1 << LPC_SC_PCONP_PCUART1_bit)
#define LPC_SC_PCONP_PCPWM1						(1 << LPC_SC_PCONP_PCPWM1_bit)
#define LPC_SC_PCONP_PCI2C0						(1 << LPC_SC_PCONP_PCI2C0_bit)
#define LPC_SC_PCONP_PCSPI						(1 << LPC_SC_PCONP_PCSPI_bit)
#define LPC_SC_PCONP_PCRTC						(1 << LPC_SC_PCONP_PCRTC_bit)
#define LPC_SC_PCONP_PCSSP1						(1 << LPC_SC_PCONP_PCSSP1_bit)
#define LPC_SC_PCONP_PCADC						(1 << LPC_SC_PCONP_PCADC_bit)
#define LPC_SC_PCONP_PCCAN1						(1 << LPC_SC_PCONP_PCCAN1_bit)
#define LPC_SC_PCONP_PCCAN2						(1 << LPC_SC_PCONP_PCCAN2_bit)
#define LPC_SC_PCONP_PCGPIO						(1 << LPC_SC_PCONP_PCGPIO_bit)
#define LPC_SC_PCONP_PCRIT						(1 << LPC_SC_PCONP_PCRIT_bit)
#define LPC_SC_PCONP_PCMCPWM					(1 << LPC_SC_PCONP_PCMCPWM_bit)
#define LPC_SC_PCONP_PCQEI						(1 << LPC_SC_PCONP_PCQEI_bit)
#define LPC_SC_PCONP_PCI2C1						(1 << LPC_SC_PCONP_PCI2C1_bit)
#define LPC_SC_PCONP_PCSSP0						(1 << LPC_SC_PCONP_PCSSP0_bit)
#define LPC_SC_PCONP_PCTIM2						(1 << LPC_SC_PCONP_PCTIM2_bit)
#define LPC_SC_PCONP_PCTIM3						(1 << LPC_SC_PCONP_PCTIM3_bit)
#define LPC_SC_PCONP_PCUART2					(1 << LPC_SC_PCONP_PCUART2_bit)
#define LPC_SC_PCONP_PCUART3					(1 << LPC_SC_PCONP_PCUART3_bit)
#define LPC_SC_PCONP_PCI2C2						(1 << LPC_SC_PCONP_PCI2C2_bit)
#define LPC_SC_PCONP_PCI2S						(1 << LPC_SC_PCONP_PCI2S_bit)
#define LPC_SC_PCONP_PCGPDMA					(1 << LPC_SC_PCONP_PCGPDMA_bit)
#define LPC_SC_PCONP_PCENET						(1 << LPC_SC_PCONP_PCENET_bit)
#define LPC_SC_PCONP_PCUSB						(1 << LPC_SC_PCONP_PCUSB_bit)

#define LPC_SC_PCONP_PCTIM0_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCTIM0_bit)
#define LPC_SC_PCONP_PCTIM1_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCTIM1_bit)
#define LPC_SC_PCONP_PCUART0_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCUART0_bit)
#define LPC_SC_PCONP_PCUART1_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCUART1_bit)
#define LPC_SC_PCONP_PCPWM1_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCPWM1_bit)
#define LPC_SC_PCONP_PCI2C0_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCI2C0_bit)
#define LPC_SC_PCONP_PCSPI_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCSPI_bit)
#define LPC_SC_PCONP_PCRTC_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCRTC_bit)
#define LPC_SC_PCONP_PCSSP1_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCSSP1_bit)
#define LPC_SC_PCONP_PCADC_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCADC_bit)
#define LPC_SC_PCONP_PCCAN1_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCCAN1_bit)
#define LPC_SC_PCONP_PCCAN2_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCCAN2_bit)
#define LPC_SC_PCONP_PCGPIO_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCGPIO_bit)
#define LPC_SC_PCONP_PCRIT_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCRIT_bit)
#define LPC_SC_PCONP_PCMCPWM_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCMCPWM_bit)
#define LPC_SC_PCONP_PCQEI_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCQEI_bit)
#define LPC_SC_PCONP_PCI2C1_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCI2C1_bit)
#define LPC_SC_PCONP_PCSSP0_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCSSP0_bit)
#define LPC_SC_PCONP_PCTIM2_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCTIM2_bit)
#define LPC_SC_PCONP_PCTIM3_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCTIM3_bit)
#define LPC_SC_PCONP_PCUART2_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCUART2_bit)
#define LPC_SC_PCONP_PCUART3_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCUART3_bit)
#define LPC_SC_PCONP_PCI2C2_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCI2C2_bit)
#define LPC_SC_PCONP_PCI2S_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCI2S_bit)
#define LPC_SC_PCONP_PCGPDMA_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCGPDMA_bit)
#define LPC_SC_PCONP_PCENET_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCENET_bit)
#define LPC_SC_PCONP_PCUSB_bb					bitband_t BITBAND(&LPC_SC->PCONP, LPC_SC_PCONP_PCUSB_bit)

/*
+-----------------------------------------------------------------------------+
| CCLKCFG - CPU Clock Configuration register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_CCLKCFG_CCLKSEL_bit				0
#define LPC_SC_CCLKCFG_CCLKSEL_0_bit			0
#define LPC_SC_CCLKCFG_CCLKSEL_1_bit			1
#define LPC_SC_CCLKCFG_CCLKSEL_2_bit			2
#define LPC_SC_CCLKCFG_CCLKSEL_3_bit			3
#define LPC_SC_CCLKCFG_CCLKSEL_4_bit			4
#define LPC_SC_CCLKCFG_CCLKSEL_5_bit			5
#define LPC_SC_CCLKCFG_CCLKSEL_6_bit			6
#define LPC_SC_CCLKCFG_CCLKSEL_7_bit			7

#define LPC_SC_CCLKCFG_CCLKSEL_0				(1 << LPC_SC_CCLKCFG_CCLKSEL_0_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_1				(1 << LPC_SC_CCLKCFG_CCLKSEL_1_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_2				(1 << LPC_SC_CCLKCFG_CCLKSEL_2_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_3				(1 << LPC_SC_CCLKCFG_CCLKSEL_3_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_4				(1 << LPC_SC_CCLKCFG_CCLKSEL_4_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_5				(1 << LPC_SC_CCLKCFG_CCLKSEL_5_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_6				(1 << LPC_SC_CCLKCFG_CCLKSEL_6_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_7				(1 << LPC_SC_CCLKCFG_CCLKSEL_7_bit)

#define LPC_SC_CCLKCFG_CCLKSEL_DIV1_value		0
#define LPC_SC_CCLKCFG_CCLKSEL_DIV2_value		1
#define LPC_SC_CCLKCFG_CCLKSEL_DIV3_value		2
#define LPC_SC_CCLKCFG_CCLKSEL_DIV4_value		3
#define LPC_SC_CCLKCFG_CCLKSEL_DIV5_value		4
#define LPC_SC_CCLKCFG_CCLKSEL_DIV6_value		5
#define LPC_SC_CCLKCFG_CCLKSEL_DIV7_value		6
#define LPC_SC_CCLKCFG_CCLKSEL_DIV8_value		7
#define LPC_SC_CCLKCFG_CCLKSEL_DIV9_value		8
#define LPC_SC_CCLKCFG_CCLKSEL_DIV10_value		9
#define LPC_SC_CCLKCFG_CCLKSEL_DIV11_value		10
#define LPC_SC_CCLKCFG_CCLKSEL_DIV12_value		11
#define LPC_SC_CCLKCFG_CCLKSEL_DIV13_value		12
#define LPC_SC_CCLKCFG_CCLKSEL_DIV14_value		13
#define LPC_SC_CCLKCFG_CCLKSEL_DIV15_value		14
#define LPC_SC_CCLKCFG_CCLKSEL_DIV16_value		15
#define LPC_SC_CCLKCFG_CCLKSEL_DIV17_value		16
#define LPC_SC_CCLKCFG_CCLKSEL_DIV18_value		17
#define LPC_SC_CCLKCFG_CCLKSEL_DIV19_value		18
#define LPC_SC_CCLKCFG_CCLKSEL_DIV20_value		19
#define LPC_SC_CCLKCFG_CCLKSEL_DIV21_value		20
#define LPC_SC_CCLKCFG_CCLKSEL_DIV22_value		21
#define LPC_SC_CCLKCFG_CCLKSEL_DIV23_value		22
#define LPC_SC_CCLKCFG_CCLKSEL_DIV24_value		23
#define LPC_SC_CCLKCFG_CCLKSEL_DIV25_value		24
#define LPC_SC_CCLKCFG_CCLKSEL_DIV26_value		25
#define LPC_SC_CCLKCFG_CCLKSEL_DIV27_value		26
#define LPC_SC_CCLKCFG_CCLKSEL_DIV28_value		27
#define LPC_SC_CCLKCFG_CCLKSEL_DIV29_value		28
#define LPC_SC_CCLKCFG_CCLKSEL_DIV30_value		29
#define LPC_SC_CCLKCFG_CCLKSEL_DIV31_value		30
#define LPC_SC_CCLKCFG_CCLKSEL_DIV32_value		31
#define LPC_SC_CCLKCFG_CCLKSEL_DIV33_value		32
#define LPC_SC_CCLKCFG_CCLKSEL_DIV34_value		33
#define LPC_SC_CCLKCFG_CCLKSEL_DIV35_value		34
#define LPC_SC_CCLKCFG_CCLKSEL_DIV36_value		35
#define LPC_SC_CCLKCFG_CCLKSEL_DIV37_value		36
#define LPC_SC_CCLKCFG_CCLKSEL_DIV38_value		37
#define LPC_SC_CCLKCFG_CCLKSEL_DIV39_value		38
#define LPC_SC_CCLKCFG_CCLKSEL_DIV40_value		39
#define LPC_SC_CCLKCFG_CCLKSEL_DIV41_value		40
#define LPC_SC_CCLKCFG_CCLKSEL_DIV42_value		41
#define LPC_SC_CCLKCFG_CCLKSEL_DIV43_value		42
#define LPC_SC_CCLKCFG_CCLKSEL_DIV44_value		43
#define LPC_SC_CCLKCFG_CCLKSEL_DIV45_value		44
#define LPC_SC_CCLKCFG_CCLKSEL_DIV46_value		45
#define LPC_SC_CCLKCFG_CCLKSEL_DIV47_value		46
#define LPC_SC_CCLKCFG_CCLKSEL_DIV48_value		47
#define LPC_SC_CCLKCFG_CCLKSEL_DIV49_value		48
#define LPC_SC_CCLKCFG_CCLKSEL_DIV50_value		49
#define LPC_SC_CCLKCFG_CCLKSEL_DIV51_value		50
#define LPC_SC_CCLKCFG_CCLKSEL_DIV52_value		51
#define LPC_SC_CCLKCFG_CCLKSEL_DIV53_value		52
#define LPC_SC_CCLKCFG_CCLKSEL_DIV54_value		53
#define LPC_SC_CCLKCFG_CCLKSEL_DIV55_value		54
#define LPC_SC_CCLKCFG_CCLKSEL_DIV56_value		55
#define LPC_SC_CCLKCFG_CCLKSEL_DIV57_value		56
#define LPC_SC_CCLKCFG_CCLKSEL_DIV58_value		57
#define LPC_SC_CCLKCFG_CCLKSEL_DIV59_value		58
#define LPC_SC_CCLKCFG_CCLKSEL_DIV60_value		59
#define LPC_SC_CCLKCFG_CCLKSEL_DIV61_value		60
#define LPC_SC_CCLKCFG_CCLKSEL_DIV62_value		61
#define LPC_SC_CCLKCFG_CCLKSEL_DIV63_value		62
#define LPC_SC_CCLKCFG_CCLKSEL_DIV64_value		63
#define LPC_SC_CCLKCFG_CCLKSEL_DIV65_value		64
#define LPC_SC_CCLKCFG_CCLKSEL_DIV66_value		65
#define LPC_SC_CCLKCFG_CCLKSEL_DIV67_value		66
#define LPC_SC_CCLKCFG_CCLKSEL_DIV68_value		67
#define LPC_SC_CCLKCFG_CCLKSEL_DIV69_value		68
#define LPC_SC_CCLKCFG_CCLKSEL_DIV70_value		69
#define LPC_SC_CCLKCFG_CCLKSEL_DIV71_value		70
#define LPC_SC_CCLKCFG_CCLKSEL_DIV72_value		71
#define LPC_SC_CCLKCFG_CCLKSEL_DIV73_value		72
#define LPC_SC_CCLKCFG_CCLKSEL_DIV74_value		73
#define LPC_SC_CCLKCFG_CCLKSEL_DIV75_value		74
#define LPC_SC_CCLKCFG_CCLKSEL_DIV76_value		75
#define LPC_SC_CCLKCFG_CCLKSEL_DIV77_value		76
#define LPC_SC_CCLKCFG_CCLKSEL_DIV78_value		77
#define LPC_SC_CCLKCFG_CCLKSEL_DIV79_value		78
#define LPC_SC_CCLKCFG_CCLKSEL_DIV80_value		79
#define LPC_SC_CCLKCFG_CCLKSEL_DIV81_value		80
#define LPC_SC_CCLKCFG_CCLKSEL_DIV82_value		81
#define LPC_SC_CCLKCFG_CCLKSEL_DIV83_value		82
#define LPC_SC_CCLKCFG_CCLKSEL_DIV84_value		83
#define LPC_SC_CCLKCFG_CCLKSEL_DIV85_value		84
#define LPC_SC_CCLKCFG_CCLKSEL_DIV86_value		85
#define LPC_SC_CCLKCFG_CCLKSEL_DIV87_value		86
#define LPC_SC_CCLKCFG_CCLKSEL_DIV88_value		87
#define LPC_SC_CCLKCFG_CCLKSEL_DIV89_value		88
#define LPC_SC_CCLKCFG_CCLKSEL_DIV90_value		89
#define LPC_SC_CCLKCFG_CCLKSEL_DIV91_value		90
#define LPC_SC_CCLKCFG_CCLKSEL_DIV92_value		91
#define LPC_SC_CCLKCFG_CCLKSEL_DIV93_value		92
#define LPC_SC_CCLKCFG_CCLKSEL_DIV94_value		93
#define LPC_SC_CCLKCFG_CCLKSEL_DIV95_value		94
#define LPC_SC_CCLKCFG_CCLKSEL_DIV96_value		95
#define LPC_SC_CCLKCFG_CCLKSEL_DIV97_value		96
#define LPC_SC_CCLKCFG_CCLKSEL_DIV98_value		97
#define LPC_SC_CCLKCFG_CCLKSEL_DIV99_value		98
#define LPC_SC_CCLKCFG_CCLKSEL_DIV100_value		99
#define LPC_SC_CCLKCFG_CCLKSEL_DIV101_value		100
#define LPC_SC_CCLKCFG_CCLKSEL_DIV102_value		101
#define LPC_SC_CCLKCFG_CCLKSEL_DIV103_value		102
#define LPC_SC_CCLKCFG_CCLKSEL_DIV104_value		103
#define LPC_SC_CCLKCFG_CCLKSEL_DIV105_value		104
#define LPC_SC_CCLKCFG_CCLKSEL_DIV106_value		105
#define LPC_SC_CCLKCFG_CCLKSEL_DIV107_value		106
#define LPC_SC_CCLKCFG_CCLKSEL_DIV108_value		107
#define LPC_SC_CCLKCFG_CCLKSEL_DIV109_value		108
#define LPC_SC_CCLKCFG_CCLKSEL_DIV110_value		109
#define LPC_SC_CCLKCFG_CCLKSEL_DIV111_value		110
#define LPC_SC_CCLKCFG_CCLKSEL_DIV112_value		111
#define LPC_SC_CCLKCFG_CCLKSEL_DIV113_value		112
#define LPC_SC_CCLKCFG_CCLKSEL_DIV114_value		113
#define LPC_SC_CCLKCFG_CCLKSEL_DIV115_value		114
#define LPC_SC_CCLKCFG_CCLKSEL_DIV116_value		115
#define LPC_SC_CCLKCFG_CCLKSEL_DIV117_value		116
#define LPC_SC_CCLKCFG_CCLKSEL_DIV118_value		117
#define LPC_SC_CCLKCFG_CCLKSEL_DIV119_value		118
#define LPC_SC_CCLKCFG_CCLKSEL_DIV120_value		119
#define LPC_SC_CCLKCFG_CCLKSEL_DIV121_value		120
#define LPC_SC_CCLKCFG_CCLKSEL_DIV122_value		121
#define LPC_SC_CCLKCFG_CCLKSEL_DIV123_value		122
#define LPC_SC_CCLKCFG_CCLKSEL_DIV124_value		123
#define LPC_SC_CCLKCFG_CCLKSEL_DIV125_value		124
#define LPC_SC_CCLKCFG_CCLKSEL_DIV126_value		125
#define LPC_SC_CCLKCFG_CCLKSEL_DIV127_value		126
#define LPC_SC_CCLKCFG_CCLKSEL_DIV128_value		127
#define LPC_SC_CCLKCFG_CCLKSEL_DIV129_value		128
#define LPC_SC_CCLKCFG_CCLKSEL_DIV130_value		129
#define LPC_SC_CCLKCFG_CCLKSEL_DIV131_value		130
#define LPC_SC_CCLKCFG_CCLKSEL_DIV132_value		131
#define LPC_SC_CCLKCFG_CCLKSEL_DIV133_value		132
#define LPC_SC_CCLKCFG_CCLKSEL_DIV134_value		133
#define LPC_SC_CCLKCFG_CCLKSEL_DIV135_value		134
#define LPC_SC_CCLKCFG_CCLKSEL_DIV136_value		135
#define LPC_SC_CCLKCFG_CCLKSEL_DIV137_value		136
#define LPC_SC_CCLKCFG_CCLKSEL_DIV138_value		137
#define LPC_SC_CCLKCFG_CCLKSEL_DIV139_value		138
#define LPC_SC_CCLKCFG_CCLKSEL_DIV140_value		139
#define LPC_SC_CCLKCFG_CCLKSEL_DIV141_value		140
#define LPC_SC_CCLKCFG_CCLKSEL_DIV142_value		141
#define LPC_SC_CCLKCFG_CCLKSEL_DIV143_value		142
#define LPC_SC_CCLKCFG_CCLKSEL_DIV144_value		143
#define LPC_SC_CCLKCFG_CCLKSEL_DIV145_value		144
#define LPC_SC_CCLKCFG_CCLKSEL_DIV146_value		145
#define LPC_SC_CCLKCFG_CCLKSEL_DIV147_value		146
#define LPC_SC_CCLKCFG_CCLKSEL_DIV148_value		147
#define LPC_SC_CCLKCFG_CCLKSEL_DIV149_value		148
#define LPC_SC_CCLKCFG_CCLKSEL_DIV150_value		149
#define LPC_SC_CCLKCFG_CCLKSEL_DIV151_value		150
#define LPC_SC_CCLKCFG_CCLKSEL_DIV152_value		151
#define LPC_SC_CCLKCFG_CCLKSEL_DIV153_value		152
#define LPC_SC_CCLKCFG_CCLKSEL_DIV154_value		153
#define LPC_SC_CCLKCFG_CCLKSEL_DIV155_value		154
#define LPC_SC_CCLKCFG_CCLKSEL_DIV156_value		155
#define LPC_SC_CCLKCFG_CCLKSEL_DIV157_value		156
#define LPC_SC_CCLKCFG_CCLKSEL_DIV158_value		157
#define LPC_SC_CCLKCFG_CCLKSEL_DIV159_value		158
#define LPC_SC_CCLKCFG_CCLKSEL_DIV160_value		159
#define LPC_SC_CCLKCFG_CCLKSEL_DIV161_value		160
#define LPC_SC_CCLKCFG_CCLKSEL_DIV162_value		161
#define LPC_SC_CCLKCFG_CCLKSEL_DIV163_value		162
#define LPC_SC_CCLKCFG_CCLKSEL_DIV164_value		163
#define LPC_SC_CCLKCFG_CCLKSEL_DIV165_value		164
#define LPC_SC_CCLKCFG_CCLKSEL_DIV166_value		165
#define LPC_SC_CCLKCFG_CCLKSEL_DIV167_value		166
#define LPC_SC_CCLKCFG_CCLKSEL_DIV168_value		167
#define LPC_SC_CCLKCFG_CCLKSEL_DIV169_value		168
#define LPC_SC_CCLKCFG_CCLKSEL_DIV170_value		169
#define LPC_SC_CCLKCFG_CCLKSEL_DIV171_value		170
#define LPC_SC_CCLKCFG_CCLKSEL_DIV172_value		171
#define LPC_SC_CCLKCFG_CCLKSEL_DIV173_value		172
#define LPC_SC_CCLKCFG_CCLKSEL_DIV174_value		173
#define LPC_SC_CCLKCFG_CCLKSEL_DIV175_value		174
#define LPC_SC_CCLKCFG_CCLKSEL_DIV176_value		175
#define LPC_SC_CCLKCFG_CCLKSEL_DIV177_value		176
#define LPC_SC_CCLKCFG_CCLKSEL_DIV178_value		177
#define LPC_SC_CCLKCFG_CCLKSEL_DIV179_value		178
#define LPC_SC_CCLKCFG_CCLKSEL_DIV180_value		179
#define LPC_SC_CCLKCFG_CCLKSEL_DIV181_value		180
#define LPC_SC_CCLKCFG_CCLKSEL_DIV182_value		181
#define LPC_SC_CCLKCFG_CCLKSEL_DIV183_value		182
#define LPC_SC_CCLKCFG_CCLKSEL_DIV184_value		183
#define LPC_SC_CCLKCFG_CCLKSEL_DIV185_value		184
#define LPC_SC_CCLKCFG_CCLKSEL_DIV186_value		185
#define LPC_SC_CCLKCFG_CCLKSEL_DIV187_value		186
#define LPC_SC_CCLKCFG_CCLKSEL_DIV188_value		187
#define LPC_SC_CCLKCFG_CCLKSEL_DIV189_value		188
#define LPC_SC_CCLKCFG_CCLKSEL_DIV190_value		189
#define LPC_SC_CCLKCFG_CCLKSEL_DIV191_value		190
#define LPC_SC_CCLKCFG_CCLKSEL_DIV192_value		191
#define LPC_SC_CCLKCFG_CCLKSEL_DIV193_value		192
#define LPC_SC_CCLKCFG_CCLKSEL_DIV194_value		193
#define LPC_SC_CCLKCFG_CCLKSEL_DIV195_value		194
#define LPC_SC_CCLKCFG_CCLKSEL_DIV196_value		195
#define LPC_SC_CCLKCFG_CCLKSEL_DIV197_value		196
#define LPC_SC_CCLKCFG_CCLKSEL_DIV198_value		197
#define LPC_SC_CCLKCFG_CCLKSEL_DIV199_value		198
#define LPC_SC_CCLKCFG_CCLKSEL_DIV200_value		199
#define LPC_SC_CCLKCFG_CCLKSEL_DIV201_value		200
#define LPC_SC_CCLKCFG_CCLKSEL_DIV202_value		201
#define LPC_SC_CCLKCFG_CCLKSEL_DIV203_value		202
#define LPC_SC_CCLKCFG_CCLKSEL_DIV204_value		203
#define LPC_SC_CCLKCFG_CCLKSEL_DIV205_value		204
#define LPC_SC_CCLKCFG_CCLKSEL_DIV206_value		205
#define LPC_SC_CCLKCFG_CCLKSEL_DIV207_value		206
#define LPC_SC_CCLKCFG_CCLKSEL_DIV208_value		207
#define LPC_SC_CCLKCFG_CCLKSEL_DIV209_value		208
#define LPC_SC_CCLKCFG_CCLKSEL_DIV210_value		209
#define LPC_SC_CCLKCFG_CCLKSEL_DIV211_value		210
#define LPC_SC_CCLKCFG_CCLKSEL_DIV212_value		211
#define LPC_SC_CCLKCFG_CCLKSEL_DIV213_value		212
#define LPC_SC_CCLKCFG_CCLKSEL_DIV214_value		213
#define LPC_SC_CCLKCFG_CCLKSEL_DIV215_value		214
#define LPC_SC_CCLKCFG_CCLKSEL_DIV216_value		215
#define LPC_SC_CCLKCFG_CCLKSEL_DIV217_value		216
#define LPC_SC_CCLKCFG_CCLKSEL_DIV218_value		217
#define LPC_SC_CCLKCFG_CCLKSEL_DIV219_value		218
#define LPC_SC_CCLKCFG_CCLKSEL_DIV220_value		219
#define LPC_SC_CCLKCFG_CCLKSEL_DIV221_value		220
#define LPC_SC_CCLKCFG_CCLKSEL_DIV222_value		221
#define LPC_SC_CCLKCFG_CCLKSEL_DIV223_value		222
#define LPC_SC_CCLKCFG_CCLKSEL_DIV224_value		223
#define LPC_SC_CCLKCFG_CCLKSEL_DIV225_value		224
#define LPC_SC_CCLKCFG_CCLKSEL_DIV226_value		225
#define LPC_SC_CCLKCFG_CCLKSEL_DIV227_value		226
#define LPC_SC_CCLKCFG_CCLKSEL_DIV228_value		227
#define LPC_SC_CCLKCFG_CCLKSEL_DIV229_value		228
#define LPC_SC_CCLKCFG_CCLKSEL_DIV230_value		229
#define LPC_SC_CCLKCFG_CCLKSEL_DIV231_value		230
#define LPC_SC_CCLKCFG_CCLKSEL_DIV232_value		231
#define LPC_SC_CCLKCFG_CCLKSEL_DIV233_value		232
#define LPC_SC_CCLKCFG_CCLKSEL_DIV234_value		233
#define LPC_SC_CCLKCFG_CCLKSEL_DIV235_value		234
#define LPC_SC_CCLKCFG_CCLKSEL_DIV236_value		235
#define LPC_SC_CCLKCFG_CCLKSEL_DIV237_value		236
#define LPC_SC_CCLKCFG_CCLKSEL_DIV238_value		237
#define LPC_SC_CCLKCFG_CCLKSEL_DIV239_value		238
#define LPC_SC_CCLKCFG_CCLKSEL_DIV240_value		239
#define LPC_SC_CCLKCFG_CCLKSEL_DIV241_value		240
#define LPC_SC_CCLKCFG_CCLKSEL_DIV242_value		241
#define LPC_SC_CCLKCFG_CCLKSEL_DIV243_value		242
#define LPC_SC_CCLKCFG_CCLKSEL_DIV244_value		243
#define LPC_SC_CCLKCFG_CCLKSEL_DIV245_value		244
#define LPC_SC_CCLKCFG_CCLKSEL_DIV246_value		245
#define LPC_SC_CCLKCFG_CCLKSEL_DIV247_value		246
#define LPC_SC_CCLKCFG_CCLKSEL_DIV248_value		247
#define LPC_SC_CCLKCFG_CCLKSEL_DIV249_value		248
#define LPC_SC_CCLKCFG_CCLKSEL_DIV250_value		249
#define LPC_SC_CCLKCFG_CCLKSEL_DIV251_value		250
#define LPC_SC_CCLKCFG_CCLKSEL_DIV252_value		251
#define LPC_SC_CCLKCFG_CCLKSEL_DIV253_value		252
#define LPC_SC_CCLKCFG_CCLKSEL_DIV254_value		253
#define LPC_SC_CCLKCFG_CCLKSEL_DIV255_value		254
#define LPC_SC_CCLKCFG_CCLKSEL_DIV256_value		255
#define LPC_SC_CCLKCFG_CCLKSEL_mask				255

#define LPC_SC_CCLKCFG_CCLKSEL_DIV1				(LPC_SC_CCLKCFG_CCLKSEL_DIV1_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV2				(LPC_SC_CCLKCFG_CCLKSEL_DIV2_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV3				(LPC_SC_CCLKCFG_CCLKSEL_DIV3_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV4				(LPC_SC_CCLKCFG_CCLKSEL_DIV4_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV5				(LPC_SC_CCLKCFG_CCLKSEL_DIV5_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV6				(LPC_SC_CCLKCFG_CCLKSEL_DIV6_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV7				(LPC_SC_CCLKCFG_CCLKSEL_DIV7_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV8				(LPC_SC_CCLKCFG_CCLKSEL_DIV8_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV9				(LPC_SC_CCLKCFG_CCLKSEL_DIV9_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV10			(LPC_SC_CCLKCFG_CCLKSEL_DIV10_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV11			(LPC_SC_CCLKCFG_CCLKSEL_DIV11_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV12			(LPC_SC_CCLKCFG_CCLKSEL_DIV12_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV13			(LPC_SC_CCLKCFG_CCLKSEL_DIV13_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV14			(LPC_SC_CCLKCFG_CCLKSEL_DIV14_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV15			(LPC_SC_CCLKCFG_CCLKSEL_DIV15_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV16			(LPC_SC_CCLKCFG_CCLKSEL_DIV16_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV17			(LPC_SC_CCLKCFG_CCLKSEL_DIV17_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV18			(LPC_SC_CCLKCFG_CCLKSEL_DIV18_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV19			(LPC_SC_CCLKCFG_CCLKSEL_DIV19_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV20			(LPC_SC_CCLKCFG_CCLKSEL_DIV20_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV21			(LPC_SC_CCLKCFG_CCLKSEL_DIV21_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV22			(LPC_SC_CCLKCFG_CCLKSEL_DIV22_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV23			(LPC_SC_CCLKCFG_CCLKSEL_DIV23_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV24			(LPC_SC_CCLKCFG_CCLKSEL_DIV24_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV25			(LPC_SC_CCLKCFG_CCLKSEL_DIV25_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV26			(LPC_SC_CCLKCFG_CCLKSEL_DIV26_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV27			(LPC_SC_CCLKCFG_CCLKSEL_DIV27_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV28			(LPC_SC_CCLKCFG_CCLKSEL_DIV28_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV29			(LPC_SC_CCLKCFG_CCLKSEL_DIV29_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV30			(LPC_SC_CCLKCFG_CCLKSEL_DIV30_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV31			(LPC_SC_CCLKCFG_CCLKSEL_DIV31_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV32			(LPC_SC_CCLKCFG_CCLKSEL_DIV32_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV33			(LPC_SC_CCLKCFG_CCLKSEL_DIV33_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV34			(LPC_SC_CCLKCFG_CCLKSEL_DIV34_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV35			(LPC_SC_CCLKCFG_CCLKSEL_DIV35_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV36			(LPC_SC_CCLKCFG_CCLKSEL_DIV36_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV37			(LPC_SC_CCLKCFG_CCLKSEL_DIV37_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV38			(LPC_SC_CCLKCFG_CCLKSEL_DIV38_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV39			(LPC_SC_CCLKCFG_CCLKSEL_DIV39_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV40			(LPC_SC_CCLKCFG_CCLKSEL_DIV40_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV41			(LPC_SC_CCLKCFG_CCLKSEL_DIV41_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV42			(LPC_SC_CCLKCFG_CCLKSEL_DIV42_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV43			(LPC_SC_CCLKCFG_CCLKSEL_DIV43_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV44			(LPC_SC_CCLKCFG_CCLKSEL_DIV44_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV45			(LPC_SC_CCLKCFG_CCLKSEL_DIV45_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV46			(LPC_SC_CCLKCFG_CCLKSEL_DIV46_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV47			(LPC_SC_CCLKCFG_CCLKSEL_DIV47_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV48			(LPC_SC_CCLKCFG_CCLKSEL_DIV48_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV49			(LPC_SC_CCLKCFG_CCLKSEL_DIV49_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV50			(LPC_SC_CCLKCFG_CCLKSEL_DIV50_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV51			(LPC_SC_CCLKCFG_CCLKSEL_DIV51_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV52			(LPC_SC_CCLKCFG_CCLKSEL_DIV52_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV53			(LPC_SC_CCLKCFG_CCLKSEL_DIV53_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV54			(LPC_SC_CCLKCFG_CCLKSEL_DIV54_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV55			(LPC_SC_CCLKCFG_CCLKSEL_DIV55_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV56			(LPC_SC_CCLKCFG_CCLKSEL_DIV56_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV57			(LPC_SC_CCLKCFG_CCLKSEL_DIV57_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV58			(LPC_SC_CCLKCFG_CCLKSEL_DIV58_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV59			(LPC_SC_CCLKCFG_CCLKSEL_DIV59_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV60			(LPC_SC_CCLKCFG_CCLKSEL_DIV60_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV61			(LPC_SC_CCLKCFG_CCLKSEL_DIV61_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV62			(LPC_SC_CCLKCFG_CCLKSEL_DIV62_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV63			(LPC_SC_CCLKCFG_CCLKSEL_DIV63_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV64			(LPC_SC_CCLKCFG_CCLKSEL_DIV64_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV65			(LPC_SC_CCLKCFG_CCLKSEL_DIV65_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV66			(LPC_SC_CCLKCFG_CCLKSEL_DIV66_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV67			(LPC_SC_CCLKCFG_CCLKSEL_DIV67_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV68			(LPC_SC_CCLKCFG_CCLKSEL_DIV68_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV69			(LPC_SC_CCLKCFG_CCLKSEL_DIV69_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV70			(LPC_SC_CCLKCFG_CCLKSEL_DIV70_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV71			(LPC_SC_CCLKCFG_CCLKSEL_DIV71_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV72			(LPC_SC_CCLKCFG_CCLKSEL_DIV72_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV73			(LPC_SC_CCLKCFG_CCLKSEL_DIV73_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV74			(LPC_SC_CCLKCFG_CCLKSEL_DIV74_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV75			(LPC_SC_CCLKCFG_CCLKSEL_DIV75_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV76			(LPC_SC_CCLKCFG_CCLKSEL_DIV76_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV77			(LPC_SC_CCLKCFG_CCLKSEL_DIV77_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV78			(LPC_SC_CCLKCFG_CCLKSEL_DIV78_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV79			(LPC_SC_CCLKCFG_CCLKSEL_DIV79_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV80			(LPC_SC_CCLKCFG_CCLKSEL_DIV80_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV81			(LPC_SC_CCLKCFG_CCLKSEL_DIV81_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV82			(LPC_SC_CCLKCFG_CCLKSEL_DIV82_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV83			(LPC_SC_CCLKCFG_CCLKSEL_DIV83_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV84			(LPC_SC_CCLKCFG_CCLKSEL_DIV84_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV85			(LPC_SC_CCLKCFG_CCLKSEL_DIV85_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV86			(LPC_SC_CCLKCFG_CCLKSEL_DIV86_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV87			(LPC_SC_CCLKCFG_CCLKSEL_DIV87_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV88			(LPC_SC_CCLKCFG_CCLKSEL_DIV88_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV89			(LPC_SC_CCLKCFG_CCLKSEL_DIV89_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV90			(LPC_SC_CCLKCFG_CCLKSEL_DIV90_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV91			(LPC_SC_CCLKCFG_CCLKSEL_DIV91_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV92			(LPC_SC_CCLKCFG_CCLKSEL_DIV92_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV93			(LPC_SC_CCLKCFG_CCLKSEL_DIV93_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV94			(LPC_SC_CCLKCFG_CCLKSEL_DIV94_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV95			(LPC_SC_CCLKCFG_CCLKSEL_DIV95_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV96			(LPC_SC_CCLKCFG_CCLKSEL_DIV96_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV97			(LPC_SC_CCLKCFG_CCLKSEL_DIV97_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV98			(LPC_SC_CCLKCFG_CCLKSEL_DIV98_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV99			(LPC_SC_CCLKCFG_CCLKSEL_DIV99_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV100			(LPC_SC_CCLKCFG_CCLKSEL_DIV100_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV101			(LPC_SC_CCLKCFG_CCLKSEL_DIV101_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV102			(LPC_SC_CCLKCFG_CCLKSEL_DIV102_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV103			(LPC_SC_CCLKCFG_CCLKSEL_DIV103_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV104			(LPC_SC_CCLKCFG_CCLKSEL_DIV104_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV105			(LPC_SC_CCLKCFG_CCLKSEL_DIV105_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV106			(LPC_SC_CCLKCFG_CCLKSEL_DIV106_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV107			(LPC_SC_CCLKCFG_CCLKSEL_DIV107_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV108			(LPC_SC_CCLKCFG_CCLKSEL_DIV108_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV109			(LPC_SC_CCLKCFG_CCLKSEL_DIV109_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV110			(LPC_SC_CCLKCFG_CCLKSEL_DIV110_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV111			(LPC_SC_CCLKCFG_CCLKSEL_DIV111_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV112			(LPC_SC_CCLKCFG_CCLKSEL_DIV112_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV113			(LPC_SC_CCLKCFG_CCLKSEL_DIV113_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV114			(LPC_SC_CCLKCFG_CCLKSEL_DIV114_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV115			(LPC_SC_CCLKCFG_CCLKSEL_DIV115_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV116			(LPC_SC_CCLKCFG_CCLKSEL_DIV116_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV117			(LPC_SC_CCLKCFG_CCLKSEL_DIV117_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV118			(LPC_SC_CCLKCFG_CCLKSEL_DIV118_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV119			(LPC_SC_CCLKCFG_CCLKSEL_DIV119_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV120			(LPC_SC_CCLKCFG_CCLKSEL_DIV120_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV121			(LPC_SC_CCLKCFG_CCLKSEL_DIV121_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV122			(LPC_SC_CCLKCFG_CCLKSEL_DIV122_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV123			(LPC_SC_CCLKCFG_CCLKSEL_DIV123_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV124			(LPC_SC_CCLKCFG_CCLKSEL_DIV124_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV125			(LPC_SC_CCLKCFG_CCLKSEL_DIV125_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV126			(LPC_SC_CCLKCFG_CCLKSEL_DIV126_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV127			(LPC_SC_CCLKCFG_CCLKSEL_DIV127_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV128			(LPC_SC_CCLKCFG_CCLKSEL_DIV128_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV129			(LPC_SC_CCLKCFG_CCLKSEL_DIV129_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV130			(LPC_SC_CCLKCFG_CCLKSEL_DIV130_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV131			(LPC_SC_CCLKCFG_CCLKSEL_DIV131_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV132			(LPC_SC_CCLKCFG_CCLKSEL_DIV132_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV133			(LPC_SC_CCLKCFG_CCLKSEL_DIV133_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV134			(LPC_SC_CCLKCFG_CCLKSEL_DIV134_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV135			(LPC_SC_CCLKCFG_CCLKSEL_DIV135_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV136			(LPC_SC_CCLKCFG_CCLKSEL_DIV136_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV137			(LPC_SC_CCLKCFG_CCLKSEL_DIV137_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV138			(LPC_SC_CCLKCFG_CCLKSEL_DIV138_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV139			(LPC_SC_CCLKCFG_CCLKSEL_DIV139_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV140			(LPC_SC_CCLKCFG_CCLKSEL_DIV140_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV141			(LPC_SC_CCLKCFG_CCLKSEL_DIV141_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV142			(LPC_SC_CCLKCFG_CCLKSEL_DIV142_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV143			(LPC_SC_CCLKCFG_CCLKSEL_DIV143_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV144			(LPC_SC_CCLKCFG_CCLKSEL_DIV144_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV145			(LPC_SC_CCLKCFG_CCLKSEL_DIV145_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV146			(LPC_SC_CCLKCFG_CCLKSEL_DIV146_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV147			(LPC_SC_CCLKCFG_CCLKSEL_DIV147_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV148			(LPC_SC_CCLKCFG_CCLKSEL_DIV148_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV149			(LPC_SC_CCLKCFG_CCLKSEL_DIV149_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV150			(LPC_SC_CCLKCFG_CCLKSEL_DIV150_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV151			(LPC_SC_CCLKCFG_CCLKSEL_DIV151_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV152			(LPC_SC_CCLKCFG_CCLKSEL_DIV152_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV153			(LPC_SC_CCLKCFG_CCLKSEL_DIV153_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV154			(LPC_SC_CCLKCFG_CCLKSEL_DIV154_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV155			(LPC_SC_CCLKCFG_CCLKSEL_DIV155_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV156			(LPC_SC_CCLKCFG_CCLKSEL_DIV156_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV157			(LPC_SC_CCLKCFG_CCLKSEL_DIV157_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV158			(LPC_SC_CCLKCFG_CCLKSEL_DIV158_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV159			(LPC_SC_CCLKCFG_CCLKSEL_DIV159_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV160			(LPC_SC_CCLKCFG_CCLKSEL_DIV160_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV161			(LPC_SC_CCLKCFG_CCLKSEL_DIV161_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV162			(LPC_SC_CCLKCFG_CCLKSEL_DIV162_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV163			(LPC_SC_CCLKCFG_CCLKSEL_DIV163_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV164			(LPC_SC_CCLKCFG_CCLKSEL_DIV164_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV165			(LPC_SC_CCLKCFG_CCLKSEL_DIV165_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV166			(LPC_SC_CCLKCFG_CCLKSEL_DIV166_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV167			(LPC_SC_CCLKCFG_CCLKSEL_DIV167_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV168			(LPC_SC_CCLKCFG_CCLKSEL_DIV168_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV169			(LPC_SC_CCLKCFG_CCLKSEL_DIV169_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV170			(LPC_SC_CCLKCFG_CCLKSEL_DIV170_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV171			(LPC_SC_CCLKCFG_CCLKSEL_DIV171_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV172			(LPC_SC_CCLKCFG_CCLKSEL_DIV172_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV173			(LPC_SC_CCLKCFG_CCLKSEL_DIV173_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV174			(LPC_SC_CCLKCFG_CCLKSEL_DIV174_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV175			(LPC_SC_CCLKCFG_CCLKSEL_DIV175_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV176			(LPC_SC_CCLKCFG_CCLKSEL_DIV176_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV177			(LPC_SC_CCLKCFG_CCLKSEL_DIV177_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV178			(LPC_SC_CCLKCFG_CCLKSEL_DIV178_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV179			(LPC_SC_CCLKCFG_CCLKSEL_DIV179_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV180			(LPC_SC_CCLKCFG_CCLKSEL_DIV180_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV181			(LPC_SC_CCLKCFG_CCLKSEL_DIV181_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV182			(LPC_SC_CCLKCFG_CCLKSEL_DIV182_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV183			(LPC_SC_CCLKCFG_CCLKSEL_DIV183_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV184			(LPC_SC_CCLKCFG_CCLKSEL_DIV184_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV185			(LPC_SC_CCLKCFG_CCLKSEL_DIV185_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV186			(LPC_SC_CCLKCFG_CCLKSEL_DIV186_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV187			(LPC_SC_CCLKCFG_CCLKSEL_DIV187_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV188			(LPC_SC_CCLKCFG_CCLKSEL_DIV188_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV189			(LPC_SC_CCLKCFG_CCLKSEL_DIV189_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV190			(LPC_SC_CCLKCFG_CCLKSEL_DIV190_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV191			(LPC_SC_CCLKCFG_CCLKSEL_DIV191_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV192			(LPC_SC_CCLKCFG_CCLKSEL_DIV192_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV193			(LPC_SC_CCLKCFG_CCLKSEL_DIV193_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV194			(LPC_SC_CCLKCFG_CCLKSEL_DIV194_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV195			(LPC_SC_CCLKCFG_CCLKSEL_DIV195_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV196			(LPC_SC_CCLKCFG_CCLKSEL_DIV196_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV197			(LPC_SC_CCLKCFG_CCLKSEL_DIV197_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV198			(LPC_SC_CCLKCFG_CCLKSEL_DIV198_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV199			(LPC_SC_CCLKCFG_CCLKSEL_DIV199_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV200			(LPC_SC_CCLKCFG_CCLKSEL_DIV200_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV201			(LPC_SC_CCLKCFG_CCLKSEL_DIV201_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV202			(LPC_SC_CCLKCFG_CCLKSEL_DIV202_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV203			(LPC_SC_CCLKCFG_CCLKSEL_DIV203_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV204			(LPC_SC_CCLKCFG_CCLKSEL_DIV204_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV205			(LPC_SC_CCLKCFG_CCLKSEL_DIV205_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV206			(LPC_SC_CCLKCFG_CCLKSEL_DIV206_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV207			(LPC_SC_CCLKCFG_CCLKSEL_DIV207_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV208			(LPC_SC_CCLKCFG_CCLKSEL_DIV208_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV209			(LPC_SC_CCLKCFG_CCLKSEL_DIV209_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV210			(LPC_SC_CCLKCFG_CCLKSEL_DIV210_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV211			(LPC_SC_CCLKCFG_CCLKSEL_DIV211_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV212			(LPC_SC_CCLKCFG_CCLKSEL_DIV212_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV213			(LPC_SC_CCLKCFG_CCLKSEL_DIV213_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV214			(LPC_SC_CCLKCFG_CCLKSEL_DIV214_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV215			(LPC_SC_CCLKCFG_CCLKSEL_DIV215_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV216			(LPC_SC_CCLKCFG_CCLKSEL_DIV216_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV217			(LPC_SC_CCLKCFG_CCLKSEL_DIV217_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV218			(LPC_SC_CCLKCFG_CCLKSEL_DIV218_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV219			(LPC_SC_CCLKCFG_CCLKSEL_DIV219_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV220			(LPC_SC_CCLKCFG_CCLKSEL_DIV220_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV221			(LPC_SC_CCLKCFG_CCLKSEL_DIV221_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV222			(LPC_SC_CCLKCFG_CCLKSEL_DIV222_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV223			(LPC_SC_CCLKCFG_CCLKSEL_DIV223_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV224			(LPC_SC_CCLKCFG_CCLKSEL_DIV224_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV225			(LPC_SC_CCLKCFG_CCLKSEL_DIV225_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV226			(LPC_SC_CCLKCFG_CCLKSEL_DIV226_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV227			(LPC_SC_CCLKCFG_CCLKSEL_DIV227_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV228			(LPC_SC_CCLKCFG_CCLKSEL_DIV228_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV229			(LPC_SC_CCLKCFG_CCLKSEL_DIV229_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV230			(LPC_SC_CCLKCFG_CCLKSEL_DIV230_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV231			(LPC_SC_CCLKCFG_CCLKSEL_DIV231_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV232			(LPC_SC_CCLKCFG_CCLKSEL_DIV232_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV233			(LPC_SC_CCLKCFG_CCLKSEL_DIV233_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV234			(LPC_SC_CCLKCFG_CCLKSEL_DIV234_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV235			(LPC_SC_CCLKCFG_CCLKSEL_DIV235_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV236			(LPC_SC_CCLKCFG_CCLKSEL_DIV236_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV237			(LPC_SC_CCLKCFG_CCLKSEL_DIV237_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV238			(LPC_SC_CCLKCFG_CCLKSEL_DIV238_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV239			(LPC_SC_CCLKCFG_CCLKSEL_DIV239_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV240			(LPC_SC_CCLKCFG_CCLKSEL_DIV240_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV241			(LPC_SC_CCLKCFG_CCLKSEL_DIV241_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV242			(LPC_SC_CCLKCFG_CCLKSEL_DIV242_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV243			(LPC_SC_CCLKCFG_CCLKSEL_DIV243_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV244			(LPC_SC_CCLKCFG_CCLKSEL_DIV244_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV245			(LPC_SC_CCLKCFG_CCLKSEL_DIV245_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV246			(LPC_SC_CCLKCFG_CCLKSEL_DIV246_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV247			(LPC_SC_CCLKCFG_CCLKSEL_DIV247_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV248			(LPC_SC_CCLKCFG_CCLKSEL_DIV248_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV249			(LPC_SC_CCLKCFG_CCLKSEL_DIV249_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV250			(LPC_SC_CCLKCFG_CCLKSEL_DIV250_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV251			(LPC_SC_CCLKCFG_CCLKSEL_DIV251_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV252			(LPC_SC_CCLKCFG_CCLKSEL_DIV252_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV253			(LPC_SC_CCLKCFG_CCLKSEL_DIV253_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV254			(LPC_SC_CCLKCFG_CCLKSEL_DIV254_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV255			(LPC_SC_CCLKCFG_CCLKSEL_DIV255_value << LPC_SC_CCLKCFG_CCLKSEL_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_DIV256			(LPC_SC_CCLKCFG_CCLKSEL_DIV256_value << LPC_SC_CCLKCFG_CCLKSEL_bit)

#define LPC_SC_CCLKCFG_CCLKSEL_0_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_0_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_1_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_1_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_2_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_2_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_3_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_3_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_4_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_4_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_5_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_5_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_6_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_6_bit)
#define LPC_SC_CCLKCFG_CCLKSEL_7_bb				bitband_t BITBAND(&LPC_SC->CCLKCFG, LPC_SC_CCLKCFG_CCLKSEL_7_bit)

/*
+-----------------------------------------------------------------------------+
| USBCLKCFG - USB Clock Configuration register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_USBCLKCFG_USBSEL_bit				0
#define LPC_SC_USBCLKCFG_USBSEL_0_bit			0
#define LPC_SC_USBCLKCFG_USBSEL_1_bit			1
#define LPC_SC_USBCLKCFG_USBSEL_2_bit			2
#define LPC_SC_USBCLKCFG_USBSEL_3_bit			3

#define LPC_SC_USBCLKCFG_USBSEL_0				(1 << LPC_SC_USBCLKCFG_USBSEL_0_bit)
#define LPC_SC_USBCLKCFG_USBSEL_1				(1 << LPC_SC_USBCLKCFG_USBSEL_1_bit)
#define LPC_SC_USBCLKCFG_USBSEL_2				(1 << LPC_SC_USBCLKCFG_USBSEL_2_bit)
#define LPC_SC_USBCLKCFG_USBSEL_3				(1 << LPC_SC_USBCLKCFG_USBSEL_3_bit)

#define LPC_SC_USBCLKCFG_USBSEL_DIV6_value		5
#define LPC_SC_USBCLKCFG_USBSEL_DIV8_value		7
#define LPC_SC_USBCLKCFG_USBSEL_DIV10_value		9
#define LPC_SC_USBCLKCFG_USBSEL_mask			15

#define LPC_SC_USBCLKCFG_USBSEL_DIV6			(LPC_SC_USBCLKCFG_USBSEL_DIV6_value << LPC_SC_USBCLKCFG_USBSEL_bit)
#define LPC_SC_USBCLKCFG_USBSEL_DIV8			(LPC_SC_USBCLKCFG_USBSEL_DIV8_value << LPC_SC_USBCLKCFG_USBSEL_bit)
#define LPC_SC_USBCLKCFG_USBSEL_DIV10			(LPC_SC_USBCLKCFG_USBSEL_DIV10_value << LPC_SC_USBCLKCFG_USBSEL_bit)

#define LPC_SC_USBCLKCFG_USBSEL_0_bb			bitband_t BITBAND(&LPC_SC->USBCLKCFG, LPC_SC_USBCLKCFG_USBSEL_0_bit)
#define LPC_SC_USBCLKCFG_USBSEL_1_bb			bitband_t BITBAND(&LPC_SC->USBCLKCFG, LPC_SC_USBCLKCFG_USBSEL_1_bit)
#define LPC_SC_USBCLKCFG_USBSEL_2_bb			bitband_t BITBAND(&LPC_SC->USBCLKCFG, LPC_SC_USBCLKCFG_USBSEL_2_bit)
#define LPC_SC_USBCLKCFG_USBSEL_3_bb			bitband_t BITBAND(&LPC_SC->USBCLKCFG, LPC_SC_USBCLKCFG_USBSEL_3_bit)

/*
+-----------------------------------------------------------------------------+
| CLKSRCSEL - Clock Source Select register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_CLKSRCSEL_CLKSRC_bit				0
#define LPC_SC_CLKSRCSEL_CLKSRC_0_bit			0
#define LPC_SC_CLKSRCSEL_CLKSRC_1_bit			1

#define LPC_SC_CLKSRCSEL_CLKSRC_0				(1 << LPC_SC_CLKSRCSEL_CLKSRC_0_bit)
#define LPC_SC_CLKSRCSEL_CLKSRC_1				(1 << LPC_SC_CLKSRCSEL_CLKSRC_1_bit)

#define LPC_SC_CLKSRCSEL_CLKSRC_RC_value		0
#define LPC_SC_CLKSRCSEL_CLKSRC_MAIN_value		1
#define LPC_SC_CLKSRCSEL_CLKSRC_RTC_value		2
#define LPC_SC_CLKSRCSEL_CLKSRC_mask			3

#define LPC_SC_CLKSRCSEL_CLKSRC_RC				(LPC_SC_CLKSRCSEL_CLKSRC_RC_value << LPC_SC_CLKSRCSEL_CLKSRC_bit)
#define LPC_SC_CLKSRCSEL_CLKSRC_MAIN			(LPC_SC_CLKSRCSEL_CLKSRC_MAIN_value << LPC_SC_CLKSRCSEL_CLKSRC_bit)
#define LPC_SC_CLKSRCSEL_CLKSRC_RTC				(LPC_SC_CLKSRCSEL_CLKSRC_RTC_value << LPC_SC_CLKSRCSEL_CLKSRC_bit)

#define LPC_SC_CLKSRCSEL_CLKSRC_0_bb			bitband_t BITBAND(&LPC_SC->CLKSRCSEL, LPC_SC_CLKSRCSEL_CLKSRC_0_bit)
#define LPC_SC_CLKSRCSEL_CLKSRC_1_bb			bitband_t BITBAND(&LPC_SC->CLKSRCSEL, LPC_SC_CLKSRCSEL_CLKSRC_1_bit)

/*
+-----------------------------------------------------------------------------+
| CANSLEEPCLR - CAN Sleep Clear register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_CANSLEEPCLR_CAN1SLEEP_bit		1
#define LPC_SC_CANSLEEPCLR_CAN2SLEEP_bit		2

#define LPC_SC_CANSLEEPCLR_CAN1SLEEP			(1 << LPC_SC_CANSLEEPCLR_CAN1SLEEP_bit)
#define LPC_SC_CANSLEEPCLR_CAN2SLEEP			(1 << LPC_SC_CANSLEEPCLR_CAN2SLEEP_bit)

#define LPC_SC_CANSLEEPCLR_CAN1SLEEP_bb			bitband_t BITBAND(&LPC_SC->CANSLEEPCLR, LPC_SC_CANSLEEPCLR_CAN1SLEEP_bit)
#define LPC_SC_CANSLEEPCLR_CAN2SLEEP_bb			bitband_t BITBAND(&LPC_SC->CANSLEEPCLR, LPC_SC_CANSLEEPCLR_CAN2SLEEP_bit)

/*
+-----------------------------------------------------------------------------+
| CANWAKEFLAGS - CAN Wake-up Flags register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_CANWAKEFLAGS_CAN1WAKE_bit		1
#define LPC_SC_CANWAKEFLAGS_CAN2WAKE_bit		2

#define LPC_SC_CANWAKEFLAGS_CAN1WAKE			(1 << LPC_SC_CANWAKEFLAGS_CAN1WAKE_bit)
#define LPC_SC_CANWAKEFLAGS_CAN2WAKE			(1 << LPC_SC_CANWAKEFLAGS_CAN2WAKE_bit)

#define LPC_SC_CANWAKEFLAGS_CAN1WAKE_bb			bitband_t BITBAND(&LPC_SC->CANWAKEFLAGS, LPC_SC_CANWAKEFLAGS_CAN1WAKE_bit)
#define LPC_SC_CANWAKEFLAGS_CAN2WAKE_bb			bitband_t BITBAND(&LPC_SC->CANWAKEFLAGS, LPC_SC_CANWAKEFLAGS_CAN2WAKE_bit)

/*
+-----------------------------------------------------------------------------+
| EXTINT - External Interrupt Flag register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_EXTINT_EINT0_bit					0
#define LPC_SC_EXTINT_EINT1_bit					1
#define LPC_SC_EXTINT_EINT2_bit					2
#define LPC_SC_EXTINT_EINT3_bit					3

#define LPC_SC_EXTINT_EINT0						(1 << LPC_SC_EXTINT_EINT0_bit)
#define LPC_SC_EXTINT_EINT1						(1 << LPC_SC_EXTINT_EINT1_bit)
#define LPC_SC_EXTINT_EINT2						(1 << LPC_SC_EXTINT_EINT2_bit)
#define LPC_SC_EXTINT_EINT3						(1 << LPC_SC_EXTINT_EINT3_bit)

#define LPC_SC_EXTINT_EINT0_bb					bitband_t BITBAND(&LPC_SC->EXTINT, LPC_SC_EXTINT_EINT0_bit)
#define LPC_SC_EXTINT_EINT1_bb					bitband_t BITBAND(&LPC_SC->EXTINT, LPC_SC_EXTINT_EINT1_bit)
#define LPC_SC_EXTINT_EINT2_bb					bitband_t BITBAND(&LPC_SC->EXTINT, LPC_SC_EXTINT_EINT2_bit)
#define LPC_SC_EXTINT_EINT3_bb					bitband_t BITBAND(&LPC_SC->EXTINT, LPC_SC_EXTINT_EINT3_bit)

/*
+-----------------------------------------------------------------------------+
| EXTMODE - External Interrupt Mode register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_EXTMODE_EXTMODE0_bit				0
#define LPC_SC_EXTMODE_EXTMODE1_bit				1
#define LPC_SC_EXTMODE_EXTMODE2_bit				2
#define LPC_SC_EXTMODE_EXTMODE3_bit				3

#define LPC_SC_EXTMODE_EXTMODE0					(1 << LPC_SC_EXTMODE_EXTMODE0_bit)
#define LPC_SC_EXTMODE_EXTMODE1					(1 << LPC_SC_EXTMODE_EXTMODE1_bit)
#define LPC_SC_EXTMODE_EXTMODE2					(1 << LPC_SC_EXTMODE_EXTMODE2_bit)
#define LPC_SC_EXTMODE_EXTMODE3					(1 << LPC_SC_EXTMODE_EXTMODE3_bit)

#define LPC_SC_EXTMODE_EXTMODE0_bb				bitband_t BITBAND(&LPC_SC->EXTMODE, LPC_SC_EXTMODE_EXTMODE0_bit)
#define LPC_SC_EXTMODE_EXTMODE1_bb				bitband_t BITBAND(&LPC_SC->EXTMODE, LPC_SC_EXTMODE_EXTMODE1_bit)
#define LPC_SC_EXTMODE_EXTMODE2_bb				bitband_t BITBAND(&LPC_SC->EXTMODE, LPC_SC_EXTMODE_EXTMODE2_bit)
#define LPC_SC_EXTMODE_EXTMODE3_bb				bitband_t BITBAND(&LPC_SC->EXTMODE, LPC_SC_EXTMODE_EXTMODE3_bit)

/*
+-----------------------------------------------------------------------------+
| EXTPOLAR - External Interrupt Polarity register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_EXTPOLAR_EXTPOLAR0_bit			0
#define LPC_SC_EXTPOLAR_EXTPOLAR1_bit			1
#define LPC_SC_EXTPOLAR_EXTPOLAR2_bit			2
#define LPC_SC_EXTPOLAR_EXTPOLAR3_bit			3

#define LPC_SC_EXTPOLAR_EXTPOLAR0				(1 << LPC_SC_EXTPOLAR_EXTPOLAR0_bit)
#define LPC_SC_EXTPOLAR_EXTPOLAR1				(1 << LPC_SC_EXTPOLAR_EXTPOLAR1_bit)
#define LPC_SC_EXTPOLAR_EXTPOLAR2				(1 << LPC_SC_EXTPOLAR_EXTPOLAR2_bit)
#define LPC_SC_EXTPOLAR_EXTPOLAR3				(1 << LPC_SC_EXTPOLAR_EXTPOLAR3_bit)

#define LPC_SC_EXTPOLAR_EXTPOLAR0_bb			bitband_t BITBAND(&LPC_SC->EXTPOLAR, LPC_SC_EXTPOLAR_EXTPOLAR0_bit)
#define LPC_SC_EXTPOLAR_EXTPOLAR1_bb			bitband_t BITBAND(&LPC_SC->EXTPOLAR, LPC_SC_EXTPOLAR_EXTPOLAR1_bit)
#define LPC_SC_EXTPOLAR_EXTPOLAR2_bb			bitband_t BITBAND(&LPC_SC->EXTPOLAR, LPC_SC_EXTPOLAR_EXTPOLAR2_bit)
#define LPC_SC_EXTPOLAR_EXTPOLAR3_bb			bitband_t BITBAND(&LPC_SC->EXTPOLAR, LPC_SC_EXTPOLAR_EXTPOLAR3_bit)

/*
+-----------------------------------------------------------------------------+
| RSID - Reset Source Identification register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_RSID_POR_bit						0
#define LPC_SC_RSID_EXTR_bit					1
#define LPC_SC_RSID_WDTR_bit					2
#define LPC_SC_RSID_BODR_bit					3

#define LPC_SC_RSID_POR							(1 << LPC_SC_RSID_POR_bit)
#define LPC_SC_RSID_EXTR						(1 << LPC_SC_RSID_EXTR_bit)
#define LPC_SC_RSID_WDTR						(1 << LPC_SC_RSID_WDTR_bit)
#define LPC_SC_RSID_BODR						(1 << LPC_SC_RSID_BODR_bit)

#define LPC_SC_RSID_POR_bb						bitband_t BITBAND(&LPC_SC->RSID, LPC_SC_RSID_POR_bit)
#define LPC_SC_RSID_EXTR_bb						bitband_t BITBAND(&LPC_SC->RSID, LPC_SC_RSID_EXTR_bit)
#define LPC_SC_RSID_WDTR_bb						bitband_t BITBAND(&LPC_SC->RSID, LPC_SC_RSID_WDTR_bit)
#define LPC_SC_RSID_BODR_bb						bitband_t BITBAND(&LPC_SC->RSID, LPC_SC_RSID_BODR_bit)

/*
+-----------------------------------------------------------------------------+
| SCS - System Controls and Status register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_SCS_OSCRANGE_bit					4
#define LPC_SC_SCS_OSCEN_bit					5
#define LPC_SC_SCS_OSCSTAT_bit					6

#define LPC_SC_SCS_OSCRANGE						(1 << LPC_SC_SCS_OSCRANGE_bit)
#define LPC_SC_SCS_OSCEN						(1 << LPC_SC_SCS_OSCEN_bit)
#define LPC_SC_SCS_OSCSTAT						(1 << LPC_SC_SCS_OSCSTAT_bit)

#define LPC_SC_SCS_OSCRANGE_bb					bitband_t BITBAND(&LPC_SC->SCS, LPC_SC_SCS_OSCRANGE_bit)
#define LPC_SC_SCS_OSCEN_bb						bitband_t BITBAND(&LPC_SC->SCS, LPC_SC_SCS_OSCEN_bit)
#define LPC_SC_SCS_OSCSTAT_bb					bitband_t BITBAND(&LPC_SC->SCS, LPC_SC_SCS_OSCSTAT_bit)

/*
+-----------------------------------------------------------------------------+
| PCLKSEL0 - Peripheral Clock Selection register 0
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PCLKSEL0_PCLK_WDT_bit			0
#define LPC_SC_PCLKSEL0_PCLK_WDT_0_bit			0
#define LPC_SC_PCLKSEL0_PCLK_WDT_1_bit			1
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_bit			2
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_0_bit		2
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_1_bit		3
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_bit			4
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_0_bit		4
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_1_bit		5
#define LPC_SC_PCLKSEL0_PCLK_UART0_bit			6
#define LPC_SC_PCLKSEL0_PCLK_UART0_0_bit		6
#define LPC_SC_PCLKSEL0_PCLK_UART0_1_bit		7
#define LPC_SC_PCLKSEL0_PCLK_UART1_bit			8
#define LPC_SC_PCLKSEL0_PCLK_UART1_0_bit		8
#define LPC_SC_PCLKSEL0_PCLK_UART1_1_bit		9
#define LPC_SC_PCLKSEL0_PCLK_PWM1_bit			12
#define LPC_SC_PCLKSEL0_PCLK_PWM1_0_bit			12
#define LPC_SC_PCLKSEL0_PCLK_PWM1_1_bit			13
#define LPC_SC_PCLKSEL0_PCLK_I2C0_bit			14
#define LPC_SC_PCLKSEL0_PCLK_I2C0_0_bit			14
#define LPC_SC_PCLKSEL0_PCLK_I2C0_1_bit			15
#define LPC_SC_PCLKSEL0_PCLK_SPI_bit			16
#define LPC_SC_PCLKSEL0_PCLK_SPI_0_bit			16
#define LPC_SC_PCLKSEL0_PCLK_SPI_1_bit			17
#define LPC_SC_PCLKSEL0_PCLK_SSP1_bit			20
#define LPC_SC_PCLKSEL0_PCLK_SSP1_0_bit			20
#define LPC_SC_PCLKSEL0_PCLK_SSP1_1_bit			21
#define LPC_SC_PCLKSEL0_PCLK_DAC_bit			22
#define LPC_SC_PCLKSEL0_PCLK_DAC_0_bit			22
#define LPC_SC_PCLKSEL0_PCLK_DAC_1_bit			23
#define LPC_SC_PCLKSEL0_PCLK_ADC_bit			24
#define LPC_SC_PCLKSEL0_PCLK_ADC_0_bit			24
#define LPC_SC_PCLKSEL0_PCLK_ADC_1_bit			25
#define LPC_SC_PCLKSEL0_PCLK_CAN1_bit			26
#define LPC_SC_PCLKSEL0_PCLK_CAN1_0_bit			26
#define LPC_SC_PCLKSEL0_PCLK_CAN1_1_bit			27
#define LPC_SC_PCLKSEL0_PCLK_CAN2_bit			28
#define LPC_SC_PCLKSEL0_PCLK_CAN2_0_bit			28
#define LPC_SC_PCLKSEL0_PCLK_CAN2_1_bit			29
#define LPC_SC_PCLKSEL0_PCLK_ACF_bit			30
#define LPC_SC_PCLKSEL0_PCLK_ACF_0_bit			30
#define LPC_SC_PCLKSEL0_PCLK_ACF_1_bit			31

#define LPC_SC_PCLKSEL0_PCLK_WDT_0				(1 << LPC_SC_PCLKSEL0_PCLK_WDT_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_WDT_1				(1 << LPC_SC_PCLKSEL0_PCLK_WDT_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_0			(1 << LPC_SC_PCLKSEL0_PCLK_TIMER0_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_1			(1 << LPC_SC_PCLKSEL0_PCLK_TIMER0_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_0			(1 << LPC_SC_PCLKSEL0_PCLK_TIMER1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_1			(1 << LPC_SC_PCLKSEL0_PCLK_TIMER1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_0			(1 << LPC_SC_PCLKSEL0_PCLK_UART0_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_1			(1 << LPC_SC_PCLKSEL0_PCLK_UART0_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_0			(1 << LPC_SC_PCLKSEL0_PCLK_UART1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_1			(1 << LPC_SC_PCLKSEL0_PCLK_UART1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_0				(1 << LPC_SC_PCLKSEL0_PCLK_PWM1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_1				(1 << LPC_SC_PCLKSEL0_PCLK_PWM1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_0				(1 << LPC_SC_PCLKSEL0_PCLK_I2C0_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_1				(1 << LPC_SC_PCLKSEL0_PCLK_I2C0_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_0				(1 << LPC_SC_PCLKSEL0_PCLK_SPI_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_1				(1 << LPC_SC_PCLKSEL0_PCLK_SPI_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_0				(1 << LPC_SC_PCLKSEL0_PCLK_SSP1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_1				(1 << LPC_SC_PCLKSEL0_PCLK_SSP1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_0				(1 << LPC_SC_PCLKSEL0_PCLK_DAC_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_1				(1 << LPC_SC_PCLKSEL0_PCLK_DAC_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_0				(1 << LPC_SC_PCLKSEL0_PCLK_ADC_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_1				(1 << LPC_SC_PCLKSEL0_PCLK_ADC_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_0				(1 << LPC_SC_PCLKSEL0_PCLK_CAN1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_1				(1 << LPC_SC_PCLKSEL0_PCLK_CAN1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_0				(1 << LPC_SC_PCLKSEL0_PCLK_CAN2_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_1				(1 << LPC_SC_PCLKSEL0_PCLK_CAN2_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_0				(1 << LPC_SC_PCLKSEL0_PCLK_ACF_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_1				(1 << LPC_SC_PCLKSEL0_PCLK_ACF_1_bit)

#define LPC_SC_PCLKSEL0_PCLK_DIV4_value			0
#define LPC_SC_PCLKSEL0_PCLK_DIV1_value			1
#define LPC_SC_PCLKSEL0_PCLK_DIV2_value			2
#define LPC_SC_PCLKSEL0_PCLK_DIV8_value			3
#define LPC_SC_PCLKSEL0_PCLK_mask				3

#define LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV4_value		0
#define LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV1_value		1
#define LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV2_value		2
#define LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV6_value		3
#define LPC_SC_PCLKSEL0_PCLK_CAN_ACF_mask			3

#define LPC_SC_PCLKSEL0_PCLK_WDT_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_WDT_bit)
#define LPC_SC_PCLKSEL0_PCLK_WDT_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_WDT_bit)
#define LPC_SC_PCLKSEL0_PCLK_WDT_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_WDT_bit)
#define LPC_SC_PCLKSEL0_PCLK_WDT_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_WDT_bit)

#define LPC_SC_PCLKSEL0_PCLK_TIMER0_DIV4		(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_TIMER0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_DIV1		(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_TIMER0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_DIV2		(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_TIMER0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_DIV8		(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_TIMER0_bit)

#define LPC_SC_PCLKSEL0_PCLK_TIMER1_DIV4		(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_TIMER1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_DIV1		(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_TIMER1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_DIV2		(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_TIMER1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_DIV8		(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_TIMER1_bit)

#define LPC_SC_PCLKSEL0_PCLK_UART0_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_UART0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_UART0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_UART0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_UART0_bit)

#define LPC_SC_PCLKSEL0_PCLK_UART1_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_UART1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_UART1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_UART1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_UART1_bit)

#define LPC_SC_PCLKSEL0_PCLK_PWM1_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_PWM1_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_PWM1_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_PWM1_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_PWM1_bit)

#define LPC_SC_PCLKSEL0_PCLK_I2C0_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_I2C0_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_I2C0_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_I2C0_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_I2C0_bit)

#define LPC_SC_PCLKSEL0_PCLK_SPI_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_SPI_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_SPI_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_SPI_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_SPI_bit)

#define LPC_SC_PCLKSEL0_PCLK_SSP1_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_SSP1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_SSP1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_SSP1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_SSP1_bit)

#define LPC_SC_PCLKSEL0_PCLK_DAC_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_DAC_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_DAC_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_DAC_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_DAC_bit)

#define LPC_SC_PCLKSEL0_PCLK_ADC_DIV4			(LPC_SC_PCLKSEL0_PCLK_DIV4_value << LPC_SC_PCLKSEL0_PCLK_ADC_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_DIV1			(LPC_SC_PCLKSEL0_PCLK_DIV1_value << LPC_SC_PCLKSEL0_PCLK_ADC_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_DIV2			(LPC_SC_PCLKSEL0_PCLK_DIV2_value << LPC_SC_PCLKSEL0_PCLK_ADC_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_DIV8			(LPC_SC_PCLKSEL0_PCLK_DIV8_value << LPC_SC_PCLKSEL0_PCLK_ADC_bit)

#define LPC_SC_PCLKSEL0_PCLK_CAN1_DIV4			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV4_value << LPC_SC_PCLKSEL0_PCLK_CAN1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_DIV1			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV1_value << LPC_SC_PCLKSEL0_PCLK_CAN1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_DIV2			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV2_value << LPC_SC_PCLKSEL0_PCLK_CAN1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_DIV6			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV6_value << LPC_SC_PCLKSEL0_PCLK_CAN1_bit)

#define LPC_SC_PCLKSEL0_PCLK_CAN2_DIV4			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV4_value << LPC_SC_PCLKSEL0_PCLK_CAN2_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_DIV1			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV1_value << LPC_SC_PCLKSEL0_PCLK_CAN2_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_DIV2			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV2_value << LPC_SC_PCLKSEL0_PCLK_CAN2_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_DIV6			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV6_value << LPC_SC_PCLKSEL0_PCLK_CAN2_bit)

#define LPC_SC_PCLKSEL0_PCLK_ACF_DIV4			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV4_value << LPC_SC_PCLKSEL0_PCLK_ACF_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_DIV1			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV1_value << LPC_SC_PCLKSEL0_PCLK_ACF_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_DIV2			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV2_value << LPC_SC_PCLKSEL0_PCLK_ACF_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_DIV6			(LPC_SC_PCLKSEL0_PCLK_CAN_ACF_DIV6_value << LPC_SC_PCLKSEL0_PCLK_ACF_bit)

#define LPC_SC_PCLKSEL0_PCLK_WDT_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_WDT_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_WDT_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_WDT_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_0_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_TIMER0_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER0_1_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_TIMER0_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_0_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_TIMER1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_TIMER1_1_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_TIMER1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_UART0_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART0_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_UART0_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_UART1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_UART1_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_UART1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_PWM1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_PWM1_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_PWM1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_I2C0_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_I2C0_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_I2C0_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_SPI_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_SPI_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_SPI_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_SSP1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_SSP1_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_SSP1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_DAC_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_DAC_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_DAC_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_ADC_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_ADC_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_ADC_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_CAN1_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN1_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_CAN1_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_CAN2_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_CAN2_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_CAN2_1_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_ACF_0_bit)
#define LPC_SC_PCLKSEL0_PCLK_ACF_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL0, LPC_SC_PCLKSEL0_PCLK_ACF_1_bit)

/*
+-----------------------------------------------------------------------------+
| PCLKSEL1 - Peripheral Clock Selection register 1
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_PCLKSEL1_PCLK_QEI_bit			0
#define LPC_SC_PCLKSEL1_PCLK_QEI_0_bit			0
#define LPC_SC_PCLKSEL1_PCLK_QEI_1_bit			1
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_bit		2
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_0_bit		2
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_1_bit		3
#define LPC_SC_PCLKSEL1_PCLK_PCB_bit			4
#define LPC_SC_PCLKSEL1_PCLK_PCB_0_bit			4
#define LPC_SC_PCLKSEL1_PCLK_PCB_1_bit			5
#define LPC_SC_PCLKSEL1_PCLK_I2C1_bit			6
#define LPC_SC_PCLKSEL1_PCLK_I2C1_0_bit			6
#define LPC_SC_PCLKSEL1_PCLK_I2C1_1_bit			7
#define LPC_SC_PCLKSEL1_PCLK_SSP0_bit			10
#define LPC_SC_PCLKSEL1_PCLK_SSP0_0_bit			10
#define LPC_SC_PCLKSEL1_PCLK_SSP0_1_bit			11
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_bit			12
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_0_bit		12
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_1_bit		13
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_bit			14
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_0_bit		14
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_1_bit		15
#define LPC_SC_PCLKSEL1_PCLK_UART2_bit			16
#define LPC_SC_PCLKSEL1_PCLK_UART2_0_bit		16
#define LPC_SC_PCLKSEL1_PCLK_UART2_1_bit		17
#define LPC_SC_PCLKSEL1_PCLK_UART3_bit			18
#define LPC_SC_PCLKSEL1_PCLK_UART3_0_bit		18
#define LPC_SC_PCLKSEL1_PCLK_UART3_1_bit		19
#define LPC_SC_PCLKSEL1_PCLK_I2C2_bit			20
#define LPC_SC_PCLKSEL1_PCLK_I2C2_0_bit			20
#define LPC_SC_PCLKSEL1_PCLK_I2C2_1_bit			21
#define LPC_SC_PCLKSEL1_PCLK_I2S_bit			22
#define LPC_SC_PCLKSEL1_PCLK_I2S_0_bit			22
#define LPC_SC_PCLKSEL1_PCLK_I2S_1_bit			23
#define LPC_SC_PCLKSEL1_PCLK_RIT_bit			26
#define LPC_SC_PCLKSEL1_PCLK_RIT_0_bit			26
#define LPC_SC_PCLKSEL1_PCLK_RIT_1_bit			27
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_bit			28
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_0_bit		28
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_1_bit		29
#define LPC_SC_PCLKSEL1_PCLK_MC_bit				30
#define LPC_SC_PCLKSEL1_PCLK_MC_0_bit			30
#define LPC_SC_PCLKSEL1_PCLK_MC_1_bit			31

#define LPC_SC_PCLKSEL1_PCLK_QEI_0				(1 << LPC_SC_PCLKSEL1_PCLK_QEI_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_QEI_1				(1 << LPC_SC_PCLKSEL1_PCLK_QEI_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_0			(1 << LPC_SC_PCLKSEL1_PCLK_GPIOINT_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_1			(1 << LPC_SC_PCLKSEL1_PCLK_GPIOINT_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_0				(1 << LPC_SC_PCLKSEL1_PCLK_PCB_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_1				(1 << LPC_SC_PCLKSEL1_PCLK_PCB_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_0				(1 << LPC_SC_PCLKSEL1_PCLK_I2C1_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_1				(1 << LPC_SC_PCLKSEL1_PCLK_I2C1_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_0				(1 << LPC_SC_PCLKSEL1_PCLK_SSP0_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_1				(1 << LPC_SC_PCLKSEL1_PCLK_SSP0_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_0			(1 << LPC_SC_PCLKSEL1_PCLK_TIMER2_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_1			(1 << LPC_SC_PCLKSEL1_PCLK_TIMER2_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_0			(1 << LPC_SC_PCLKSEL1_PCLK_TIMER3_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_1			(1 << LPC_SC_PCLKSEL1_PCLK_TIMER3_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_0			(1 << LPC_SC_PCLKSEL1_PCLK_UART2_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_1			(1 << LPC_SC_PCLKSEL1_PCLK_UART2_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_0			(1 << LPC_SC_PCLKSEL1_PCLK_UART3_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_1			(1 << LPC_SC_PCLKSEL1_PCLK_UART3_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_0				(1 << LPC_SC_PCLKSEL1_PCLK_I2C2_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_1				(1 << LPC_SC_PCLKSEL1_PCLK_I2C2_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_0				(1 << LPC_SC_PCLKSEL1_PCLK_I2S_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_1				(1 << LPC_SC_PCLKSEL1_PCLK_I2S_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_0				(1 << LPC_SC_PCLKSEL1_PCLK_RIT_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_1				(1 << LPC_SC_PCLKSEL1_PCLK_RIT_1_bit)t)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_0			(1 << LPC_SC_PCLKSEL1_PCLK_SYSCON_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_1			(1 << LPC_SC_PCLKSEL1_PCLK_SYSCON_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_0				(1 << LPC_SC_PCLKSEL1_PCLK_MC_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_1				(1 << LPC_SC_PCLKSEL1_PCLK_MC_1_bit)

#define LPC_SC_PCLKSEL1_PCLK_DIV4_value			0
#define LPC_SC_PCLKSEL1_PCLK_DIV1_value			1
#define LPC_SC_PCLKSEL1_PCLK_DIV2_value			2
#define LPC_SC_PCLKSEL1_PCLK_DIV8_value			3
#define LPC_SC_PCLKSEL1_PCLK_mask				3

#define LPC_SC_PCLKSEL1_PCLK_QEI_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_QEI_bit)
#define LPC_SC_PCLKSEL1_PCLK_QEI_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_QEI_bit)
#define LPC_SC_PCLKSEL1_PCLK_QEI_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_QEI_bit)
#define LPC_SC_PCLKSEL1_PCLK_QEI_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_QEI_bit)

#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_DIV4		(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_GPIOINT_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_DIV1		(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_GPIOINT_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_DIV2		(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_GPIOINT_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_DIV8		(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_GPIOINT_bit)

#define LPC_SC_PCLKSEL1_PCLK_PCB_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_PCB_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_PCB_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_PCB_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_PCB_bit)

#define LPC_SC_PCLKSEL1_PCLK_I2C1_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_I2C1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_I2C1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_I2C1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_I2C1_bit)

#define LPC_SC_PCLKSEL1_PCLK_SSP0_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_SSP0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_SSP0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_SSP0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_SSP0_bit)

#define LPC_SC_PCLKSEL1_PCLK_TIMER2_DIV4		(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_TIMER2_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_DIV1		(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_TIMER2_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_DIV2		(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_TIMER2_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_DIV8		(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_TIMER2_bit)

#define LPC_SC_PCLKSEL1_PCLK_TIMER3_DIV4		(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_TIMER3_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_DIV1		(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_TIMER3_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_DIV2		(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_TIMER3_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_DIV8		(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_TIMER3_bit)

#define LPC_SC_PCLKSEL1_PCLK_UART2_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_UART2_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_UART2_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_UART2_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_UART2_bit)

#define LPC_SC_PCLKSEL1_PCLK_UART3_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_UART3_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_UART3_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_UART3_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_UART3_bit)

#define LPC_SC_PCLKSEL1_PCLK_I2C2_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_I2C2_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_I2C2_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_I2C2_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_I2C2_bit)

#define LPC_SC_PCLKSEL1_PCLK_I2S_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_I2S_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_I2S_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_I2S_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_I2S_bit)

#define LPC_SC_PCLKSEL1_PCLK_RIT_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_RIT_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_RIT_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_RIT_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_RIT_bit)

#define LPC_SC_PCLKSEL1_PCLK_SYSCON_DIV4		(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_SYSCON_bit)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_DIV1		(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_SYSCON_bit)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_DIV2		(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_SYSCON_bit)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_DIV8		(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_SYSCON_bit)

#define LPC_SC_PCLKSEL1_PCLK_MC_DIV4			(LPC_SC_PCLKSEL1_PCLK_DIV4_value << LPC_SC_PCLKSEL1_PCLK_MC_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_DIV1			(LPC_SC_PCLKSEL1_PCLK_DIV1_value << LPC_SC_PCLKSEL1_PCLK_MC_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_DIV2			(LPC_SC_PCLKSEL1_PCLK_DIV2_value << LPC_SC_PCLKSEL1_PCLK_MC_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_DIV8			(LPC_SC_PCLKSEL1_PCLK_DIV8_value << LPC_SC_PCLKSEL1_PCLK_MC_bit)

#define LPC_SC_PCLKSEL1_PCLK_QEI_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_QEI_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_QEI_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_QEI_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_0_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_GPIOINT_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_GPIOINT_1_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_GPIOINT_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_PCB_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_PCB_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_PCB_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_I2C1_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C1_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_I2C1_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_SSP0_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SSP0_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_SSP0_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_0_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_TIMER2_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER2_1_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_TIMER2_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_0_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_TIMER3_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_TIMER3_1_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_TIMER3_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_UART2_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART2_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_UART2_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_UART3_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_UART3_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_UART3_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_I2C2_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2C2_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_I2C2_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_I2S_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_I2S_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_I2S_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_RIT_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_RIT_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_RIT_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_0_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_SYSCON_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_SYSCON_1_bb		bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_SYSCON_1_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_0_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_MC_0_bit)
#define LPC_SC_PCLKSEL1_PCLK_MC_1_bb			bitband_t BITBAND(&LPC_SC->PCLKSEL1, LPC_SC_PCLKSEL1_PCLK_MC_1_bit)

/*
+-----------------------------------------------------------------------------+
| USBIntSt - USB Interrupt Status register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_USBIntSt_USB_INT_REQ_LP_bit		0
#define LPC_SC_USBIntSt_USB_INT_REQ_HP_bit		1
#define LPC_SC_USBIntSt_USB_INT_REQ_DMA_bit		2
#define LPC_SC_USBIntSt_USB_HOST_INT_bit		3
#define LPC_SC_USBIntSt_USB_ATX_INT_bit			4
#define LPC_SC_USBIntSt_USB_OTG_INT_bit			5
#define LPC_SC_USBIntSt_USB_I2C_INT_bit			6
#define LPC_SC_USBIntSt_USB_NEED_CLK_bit		8
#define LPC_SC_USBIntSt_EN_USB_INTS_bit			31

#define LPC_SC_USBIntSt_USB_INT_REQ_LP			(1 << LPC_SC_USBIntSt_USB_INT_REQ_LP_bit)
#define LPC_SC_USBIntSt_USB_INT_REQ_HP			(1 << LPC_SC_USBIntSt_USB_INT_REQ_HP_bit)
#define LPC_SC_USBIntSt_USB_INT_REQ_DMA			(1 << LPC_SC_USBIntSt_USB_INT_REQ_DMA_bit)
#define LPC_SC_USBIntSt_USB_HOST_INT			(1 << LPC_SC_USBIntSt_USB_HOST_INT_bit)
#define LPC_SC_USBIntSt_USB_ATX_INT				(1 << LPC_SC_USBIntSt_USB_ATX_INT_bit)
#define LPC_SC_USBIntSt_USB_OTG_INT				(1 << LPC_SC_USBIntSt_USB_OTG_INT_bit)
#define LPC_SC_USBIntSt_USB_I2C_INT				(1 << LPC_SC_USBIntSt_USB_I2C_INT_bit)
#define LPC_SC_USBIntSt_USB_NEED_CLK			(1 << LPC_SC_USBIntSt_USB_NEED_CLK_bit)
#define LPC_SC_USBIntSt_EN_USB_INTS				(1 << LPC_SC_USBIntSt_EN_USB_INTS_bit)

#define LPC_SC_USBIntSt_USB_INT_REQ_LP_bb		bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_INT_REQ_LP_bit)
#define LPC_SC_USBIntSt_USB_INT_REQ_HP_bb		bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_INT_REQ_HP_bit)
#define LPC_SC_USBIntSt_USB_INT_REQ_DMA_bb		bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_INT_REQ_DMA_bit)
#define LPC_SC_USBIntSt_USB_HOST_INT_bb			bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_HOST_INT_bit)
#define LPC_SC_USBIntSt_USB_ATX_INT_bb			bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_ATX_INT_bit)
#define LPC_SC_USBIntSt_USB_OTG_INT_bb			bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_OTG_INT_bit)
#define LPC_SC_USBIntSt_USB_I2C_INT_bb			bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_I2C_INT_bit)
#define LPC_SC_USBIntSt_USB_NEED_CLK_bb			bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_USB_NEED_CLK_bit)
#define LPC_SC_USBIntSt_EN_USB_INTS_bb			bitband_t BITBAND(&LPC_SC->USBIntSt, LPC_SC_USBIntSt_EN_USB_INTS_bit)

/*
+-----------------------------------------------------------------------------+
| DMAReqSel - DMA Request Select register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_DMAReqSel_DMASEL08_bit			0
#define LPC_SC_DMAReqSel_DMASEL09_bit			1
#define LPC_SC_DMAReqSel_DMASEL10_bit			2
#define LPC_SC_DMAReqSel_DMASEL11_bit			3
#define LPC_SC_DMAReqSel_DMASEL12_bit			4
#define LPC_SC_DMAReqSel_DMASEL13_bit			5
#define LPC_SC_DMAReqSel_DMASEL14_bit			6
#define LPC_SC_DMAReqSel_DMASEL15_bit			7

#define LPC_SC_DMAReqSel_DMASEL08				(1 << LPC_SC_DMAReqSel_DMASEL08_bit)
#define LPC_SC_DMAReqSel_DMASEL09				(1 << LPC_SC_DMAReqSel_DMASEL09_bit)
#define LPC_SC_DMAReqSel_DMASEL10				(1 << LPC_SC_DMAReqSel_DMASEL10_bit)
#define LPC_SC_DMAReqSel_DMASEL11				(1 << LPC_SC_DMAReqSel_DMASEL11_bit)
#define LPC_SC_DMAReqSel_DMASEL12				(1 << LPC_SC_DMAReqSel_DMASEL12_bit)
#define LPC_SC_DMAReqSel_DMASEL13				(1 << LPC_SC_DMAReqSel_DMASEL13_bit)
#define LPC_SC_DMAReqSel_DMASEL14				(1 << LPC_SC_DMAReqSel_DMASEL14_bit)
#define LPC_SC_DMAReqSel_DMASEL15				(1 << LPC_SC_DMAReqSel_DMASEL15_bit)

#define LPC_SC_DMAReqSel_DMASEL08				(1 << LPC_SC_DMAReqSel_DMASEL08_bit)
#define LPC_SC_DMAReqSel_DMASEL09				(1 << LPC_SC_DMAReqSel_DMASEL09_bit)
#define LPC_SC_DMAReqSel_DMASEL10				(1 << LPC_SC_DMAReqSel_DMASEL10_bit)
#define LPC_SC_DMAReqSel_DMASEL11				(1 << LPC_SC_DMAReqSel_DMASEL11_bit)
#define LPC_SC_DMAReqSel_DMASEL12				(1 << LPC_SC_DMAReqSel_DMASEL12_bit)
#define LPC_SC_DMAReqSel_DMASEL13				(1 << LPC_SC_DMAReqSel_DMASEL13_bit)
#define LPC_SC_DMAReqSel_DMASEL14				(1 << LPC_SC_DMAReqSel_DMASEL14_bit)
#define LPC_SC_DMAReqSel_DMASEL15				(1 << LPC_SC_DMAReqSel_DMASEL15_bit)

/*
+-----------------------------------------------------------------------------+
| CLKOUTCFG - Clock Output Configuration register
+-----------------------------------------------------------------------------+
*/

#define LPC_SC_CLKOUTCFG_CLKOUTSEL_bit			0
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_0_bit		0
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_1_bit		1
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_2_bit		2
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_3_bit		3
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_bit			4
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_0_bit		4
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_1_bit		5
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_2_bit		6
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_3_bit		7
#define LPC_SC_CLKOUTCFG_CLKOUT_EN_bit			8
#define LPC_SC_CLKOUTCFG_CLKOUT_ACT_bit			9

#define LPC_SC_CLKOUTCFG_CLKOUTSEL_0			(1 << LPC_SC_CLKOUTCFG_CLKOUTSEL_0_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_1			(1 << LPC_SC_CLKOUTCFG_CLKOUTSEL_1_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_2			(1 << LPC_SC_CLKOUTCFG_CLKOUTSEL_2_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_3			(1 << LPC_SC_CLKOUTCFG_CLKOUTSEL_3_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_0			(1 << LPC_SC_CLKOUTCFG_CLKOUTDIV_0_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_1			(1 << LPC_SC_CLKOUTCFG_CLKOUTDIV_1_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_2			(1 << LPC_SC_CLKOUTCFG_CLKOUTDIV_2_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_3			(1 << LPC_SC_CLKOUTCFG_CLKOUTDIV_3_bit)
#define LPC_SC_CLKOUTCFG_CLKOUT_EN				(1 << LPC_SC_CLKOUTCFG_CLKOUT_EN_bit)
#define LPC_SC_CLKOUTCFG_CLKOUT_ACT				(1 << LPC_SC_CLKOUTCFG_CLKOUT_ACT_bit)

#define LPC_SC_CLKOUTCFG_CLKOUTSEL_CPU_value	0
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_MAIN_value	1
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_RC_value		2
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_USB_value	3
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_RTC_value	4
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_mask			15

#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV1_value		0
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV2_value		1
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV3_value		2
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV4_value		3
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV5_value		4
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV6_value		5
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV7_value		6
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV8_value		7
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV9_value		8
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV10_value		9
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV11_value		10
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV12_value		11
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV13_value		12
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV14_value		13
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV15_value		14
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV16_value		15
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_mask				15

#define LPC_SC_CLKOUTCFG_CLKOUTSEL_CPU			(LPC_SC_CLKOUTCFG_CLKOUTSEL_CPU_value << LPC_SC_CLKOUTCFG_CLKOUTSEL_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_MAIN			(LPC_SC_CLKOUTCFG_CLKOUTSEL_MAIN_value << LPC_SC_CLKOUTCFG_CLKOUTSEL_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_RC			(LPC_SC_CLKOUTCFG_CLKOUTSEL_RC_value << LPC_SC_CLKOUTCFG_CLKOUTSEL_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_USB			(LPC_SC_CLKOUTCFG_CLKOUTSEL_USB_value << LPC_SC_CLKOUTCFG_CLKOUTSEL_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_RTC			(LPC_SC_CLKOUTCFG_CLKOUTSEL_RTC_value << LPC_SC_CLKOUTCFG_CLKOUTSEL_bit)

#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV1			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV1_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV2			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV2_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV3			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV3_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV4			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV4_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV5			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV5_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV6			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV6_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV7			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV7_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV8			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV8_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV9			(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV9_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV10		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV10_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV11		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV11_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV12		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV12_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV13		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV13_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV14		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV14_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV15		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV15_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV16		(LPC_SC_CLKOUTCFG_CLKOUTDIV_DIV16_value << LPC_SC_CLKOUTCFG_CLKOUTDIV_bit)

#define LPC_SC_CLKOUTCFG_CLKOUTSEL_0_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTSEL_0_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_1_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTSEL_1_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_2_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTSEL_2_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTSEL_3_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTSEL_3_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_0_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTDIV_0_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_1_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTDIV_1_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_2_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTDIV_2_bit)
#define LPC_SC_CLKOUTCFG_CLKOUTDIV_3_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUTDIV_3_bit)
#define LPC_SC_CLKOUTCFG_CLKOUT_EN_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUT_EN_bit)
#define LPC_SC_CLKOUTCFG_CLKOUT_ACT_bb			bitband_t BITBAND(&LPC_SC->CLKOUTCFG, LPC_SC_CLKOUTCFG_CLKOUT_ACT_bit)

/******************************************************************************
* END OF FILE
******************************************************************************/
#endif /* HDR_SC_H_ */
